This is extending commit 6516c9b349 ("spl: binman: Disable u_boot_any
symbols for i.MX8M boards") to i.MX93 boards.
Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
When using the USB OTG FEL mode on the Allwinner H616, the BootROM
stores some data at the end of SRAM C. This is also the location where
we place the initial SPL stack, so it will overwrite this data.
We still need the BROM code after running the SPL, so should leave that
area alone.
Interestingly this does not seem to have an adverse effect, I guess on
the "way out" (when we return to FEL after the SPL has run), this data
is not needed by the BROM, for just the trailing end of the USB operation.
However this is still wrong, and we should not clobber BROM data.
Lower the SPL stack address to be situated right below the swap buffers
we use in sunxi-fel: that should be out of the way of everyone else.
This obsoletes a previous commit (eb53e7743c) with the same name:
that one was changing the address in an *unused* macro in sunxi_common.h,
so the previous patch didn't have any effect at all.
Fixes: eb53e7743c ("sunxi: h616: lower SPL stack address to avoid BROM data")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
If we don't DMA-align buffers we pass to FAT, it will align them itself.
This behaviour likely should be deprecated in favor of
CONFIG_BOUNCE_BUFFER, but that's a task for another series. For the
meantime, don't bother aligning the buffer unless we had been doing so in
the past.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the mmc loader to spl_load. Legacy images are handled by
spl_load (via spl_parse_image_header), so mmc_load_legacy can be
omitted. To accurately determine whether mmc_load_image_raw_sector is used
(which might not be the case if SYS_MMCSD_FS_BOOT is enabled), we introduce
a helper config SYS_MMCSD_RAW_MODE. This ensures we can inline spl_load
correctly when a board only boots from filesystems. We still need to check
for SPL_MMC, since some boards enable configure raw mode even without MMC
support.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Aligning addresses and sizes causes overhead which is unnecessary when we
are not loading from block devices. Remove bl_len when it is not needed.
For example, on iot2050 we save 144 bytes with this patch (once the rest of
this series is applied):
add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-144 (-144)
Function old new delta
spl_load_simple_fit 920 904 -16
load_simple_fit 496 444 -52
spl_spi_load_image 384 308 -76
Total: Before=87431, After=87287, chg -0.16%
We use panic() instead of BUILD_BUG_ON in spl_set_bl_len because we still
need to be able to compile it for things like mmc_load_image_raw_sector,
even if that function will not be used.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The purpose of SHOW_ERRORS is to print extra information. Make it depend
on LIBCOMMON to avoid having to check for two configs.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename SPL_MTD_SUPPORT to SPL_MTD in order to match MTD. This allows using
CONFIG_IS_ENABLED to test for MTD support.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This adds the remaining code bits to teach U-Boot about Allwinner's
newest SoC generation. This was introduced with the RISC-V based
Allwinner D1 SoC, which actually shares a die with the ARM cores versions
called R528 (BGA, without DRAM) and T113s (QFP, with embedded DRAM).
This adds the new Kconfig stanza, using the two newly introduced symbols
for the new SoC generation and pincontroller. It also adds the new symbols
to the relavent code places, to set all the hardcoded bits directly.
We need one DT override:
The ARM core version of the DT specifies the CPUX watchdog as
"reserved", which means it won't be recognised by U-Boot. Override this
in our generic sunxi-u-boot.dtsi, to let U-Boot pick up this watchdog,
so that the generic reset driver will work.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Allwinner seems to typically stick to a common MMIO memory map for
several SoCs, but from time to time does some breaking changes, which
also introduce new generations of some peripherals. The last time this
happened with the H6, which apart from re-organising the base addresses
also changed the clock controller significantly. We added a
CONFIG_SUN50I_GEN_H6 symbol back then to mark SoCs sharing those traits.
Now the Allwinner D1 changes the memory map again, and also extends the
pincontroller, among other peripherals.
To mark this generation of SoCs, add a CONFIG_SUNXI_GEN_NCAT2 symbol,
this name is reportedly used in the Allwinner BSP code, and prevents us
from inventing our own name.
Add this new symbol to some guards that were already checking for the H6
generation, since many features are shared between the two (like the
renovated clock controller).
This paves the way to introduce a first user of this generation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org>
If EXT4_WRITE is enabled, write capabilities will be compiled into SPL, but
not CRC16. Add an option to enable CRC16 to avoid linker errors.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.
Signed-off-by: Simon Glass <sjg@chromium.org>
We like to put the SPL first so it is clear that it relates to SPL. Rename
various malloc-related options which have crept in, to stick to this
convention.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0". However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
All SPL hash algorithm options are collected in lib/Kconfig. Move
SPL_CRC32 there as well.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is another SPL_MD5 option defined in lib/Kconfig.
Renaming SPL_MD5_SUPPORT introduced duplicate option with
different description. As for now FIT and hash algorithm options
are not related to each others, removing a duplicate option seems OK.
Fixes: 4b00fd1a84 ("Kconfig: Rename SPL_MD5_SUPPORT to SPL_MD5")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Describe which numeric values can be used for as scratch options for
OpenSBI.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Add kconfig options to enable NVME and PCI NVMe support in SPL
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_GADGET and related symbols. Fix typo and
rename SPL_USB_GADGET to "USB Gadget Support in SPL" .
Update the gadget Makefile to match the symbol changes.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_STORAGE and matching SYS_USB_FAT_BOOT_PARTITION .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_HOST and updates help text of both USB_HOST
and SPL_USB_HOST .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
On some platforms is SYS_MMCSD_FS_BOOT_PARTITION unsupported. So allow to
completely disable MMC FS Boot support via new option SYS_MMCSD_FS_BOOT.
By default MMC FS Boot support is enabled (like it was before) except for
ARCH_MVEBU where MMC FS Boot supported is unsupported due to Marvell
BootROM limitations.
Signed-off-by: Pali Rohár <pali@kernel.org>
Current default size of 0x100000 is not capable of getting the FIT
buffer during boot when transitioning to using binman generated boot
images for certain K3 devices, so increase it to 0x400000. Since A72 SPL
is coming after relocation to DDR this should not be an issue for any K3
device, so make it default for all.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
fdt_addr will build as part of SPL_LOAD_FIT or SPL_LOAD_FIT_FULL
which is indeed required to build optee image support in SPL.
common/spl/spl.c: In function ‘jump_to_image_optee’:
common/spl/spl.c:220:46: error: ‘struct spl_image_info’ has no member named ‘fdt_addr’
220 | spl_optee_entry(NULL, NULL, spl_image->fdt_addr,
Fix the dependency support.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
As it's no longer possible to have !DM_USB set, we can remove these
dependencies.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we enable CONFIG_SPL and CONFIG_SPL_SEMIHOSTING then the code
in common/spl/spl_semihosting.c tries to use the
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME string which remains undeclared
unless SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS are configured.
Add a dependency of SPL_SEMIHOSTING in the depends for
SPL_FS_LOAD_PAYLOAD_NAME so that the code compiles fine.
Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This moves SYS_SATA_FAT_BOOT_PARTITION to Kconfig and enforces the
current default via Kconfig rather than C code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The code for these two options depends on having the FIT loadables
recorded in the FDT. Thus, these options require the full version of
the SPL_LOAD_FIT code.
Signed-off-by: Samuel Holland <samuel@sholland.org>
It was noticed that while converting CONFIG_SPL_PAD_TO to Kconfig its
value for the MIPS MT762x/8x targets got not ported correctly. Its
default is not 0x10000 instead of 0x0. This patch fixes this issue.
Fixes: ca8a329a1b ("Convert CONFIG_SPL_PAD_TO et al to Kconfig")
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ruben Winters <Ruben.Winters@gooiland-elektro.nl>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Introduce CONFIG_SPL_MEMORY to allow Memory drivers to
be built for SPL.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some configuration symbols formerly defined in header files were
recently converted to Kconfig symbols. This moved their value definition
into *every* defconfig file, even though those values are hardly board
choices.
Use the new Kconfig option to define per-SoC default values, in just one
place, which makes the definition in each defconfig file redundant.
We refrain from setting a sunxi specific value for CONFIG_SYS_BOOTM_LEN,
so this defaults to a much better 64MB for uncompressed arm64 kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
32-bit Marvell Armada BootROMs limit maximal size of SPL image to 192 kB.
So define 192 kB (= 0x30000) limit as default value for SPL_SIZE_LIMIT.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Selecting this option can be handled in the Kconfig option itself, as it
is with BLK. Update this an drop the various 'select' clauses.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is fact really related to SPL. For U-Boot proper we always use
driver model for block devices, so CONFIG_BLK is enabled if block devices
are in use.
It is only for SPL that we have two cases:
- SPL_BLK is enabled, in which case we use driver model and blk-uclass.c
- SPL_BLK is not enabled, in which case (if we need block devices) we must
use blk_legacy.c
Rename the symbol to SPL_LEGACY_BLOCK to make this clear. This is
different enough from BLK and SPL_BLK that there should be no confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
The CONFIG_SPL_MAX_SIZE could be 0x27000 for i.MX8MM when SPL_TEXT_BASE
set to 0x7E1000.
The DDR firmware max uses 96KB, there is a 4KB padding header before
SPL_TEXT_BASE, so the SPL MAX SIZE is `256KB - 96KB - 4KB`.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Do not use 0 as address for memory because of the special meaning for
pointers (null pointer). Change the spl bss start address to the second
page.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220714134733.7487-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The ISW_ENTRY_ADDR symbol was used for OMAP devices in place of
SPL_TEXT_BASE. Keystone2 HS devices were not using it right either.
Remove ISW_ENTRY_ADDR and use SPL_TEXT_BASE directly.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
SPL on mvebu loads proper U-Boot from custom Marvell kwbimage format and
therefore support for other binary formats is not required to be present in
SPL. Boot source of proper U-Boot is defined by compile time options and
therefore it is not required to enable all possible and unused peripherals
in SPL by default.
This change decrease size of SPL binaries.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch removes the dependency to SPL_NAND_DRIVERS for SPL_NAND_BASE to
allow minimal spl nand driver to use nand base for probing NAND chips.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The AST2600 bootrom has a max size of 64KB. This can be overridden if the
system is running the SPL from SPI NOR and not using secure boot.
Signed-off-by: Joel Stanley <joel@jms.id.au>
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.
Signed-off-by: Tom Rini <trini@konsulko.com>
