Commit graph

11 commits

Author SHA1 Message Date
Fabio Estevam
bdb9f7604d mx6qsabrelite: No need to set the direction for GPIO3_23 again
There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.

Use gpio_set_value() for changing the GPIO output then.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2012-05-15 08:31:31 +02:00
Wolfgang Denk
f5cdc11775 Prepare v2012.04-rc2; minor Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-04-16 23:13:51 +02:00
Eric Nelson
1c9ceff8ca i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
This is needed to support Freescale-supplied userspaces.

At the moment, both the IPU and VPU libraries provided by Freescale
in the "imx-lib" package contain routines which scrape the system
revision from /proc/cpuinfo. In the VPU library, this information is
used to load the proper firmware, allowing a single binary to be used
across various i.MX processors.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-03-27 09:41:15 +02:00
Eric Nelson
d928a8f3f3 mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-03-27 09:41:15 +02:00
Wolfgang Grandegger
2ea73e9e38 mx6qsabrelite: add and enable USB Host 1 support
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2012-03-26 23:09:23 +02:00
Troy Kisky
2bf3359ea5 i.mx6q: mx6qsabrelite: Update the network configuration
Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.

There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.

setenv disable_giga 1

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-02-27 21:19:25 +01:00
Eric Nelson
ba54b9276a mx6q: mx6qsabrelite: Provide default serial flash bus and chip-select
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Eric Nelson
373a1d8c0e mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Jason Liu
2af81e2735 i.mx6q: mx6qsabrelite: Add the ethernet function support
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:26 +01:00
Troy Kisky
8e7d7b6b25 i.mx6q: mx6qsabrelite: Setup uart1 pinmux
This allows the Linux kernel to use UART1 before pinmux
support is added for UART1

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-02-12 10:11:26 +01:00
Jason Liu
bc5833c49a i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board
Add the initial support for Freescale i.MX6Q Sabre Lite board

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
2012-01-16 08:40:10 +01:00