Commit graph

5 commits

Author SHA1 Message Date
Oleksandr Suvorov
f42c0726fd arm: dts: imx8mn-u-boot: use versioned ddr4 firmware
NXP tested imx8mn-ddr4 with firmware version 201810 only. Use this
version for all imx8mn targets with DRAM DDR4.

Fixes: 93c4c0e4dd ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 19:44:23 +01:00
Marek Vasut
9694c0532a arm: dts: imx8m: Require ATF BL31 blob only if not PSCI provider
In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Dario Binacchi
6629e15904 arm: dts: imx8mn-u-boot: fix DDR3 only support
In case the CONFIG_IMX8M_LPDDR4 and CONFIG_IMX8M_DDR4 options are both
disabled (i. e. BSH boards), binmain fails because DDR4 bin files are
missing.

Fixes: 93c4c0e4dd ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:56:23 +01:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Adam Ford
93c4c0e4dd arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.

This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3.  Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.

This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2022-10-24 13:43:20 +02:00