Commit graph

5 commits

Author SHA1 Message Date
Caleb Connolly
76c53dad6b iommu: add a connect op
Add an optional iommu callback to be invoked before a device probes.
This can be used to configure the IOMMU in preparation for the device
(e.g. by allocating a context bank)

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2023-12-21 11:59:49 -05:00
Caleb Connolly
e96ecbe719 iommu: fix compilation when CONFIG_PCI disabled
The dev_pci_iommu_enable() function is only available when CONFIG_PCI is
enabled, replace the runtime check with a preprocessor one to fix
compilation with pci disabled.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2023-12-21 11:59:49 -05:00
Mark Kettenis
1fc2329121 iommu: Implement mapping IOMMUs for PCI devices
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port.  In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree.  Parse this property
and use it to find the right IOMMU device for PCI devices.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:58 -05:00
Mark Kettenis
dd6b68ed4f iommu: Add DMA mapping operations
In order to support IOMMUs in non-bypass mode we need device ops
to map and unmap DMA memory.  The map operation enters a mapping
for a region specified by CPU address and size into the translation
table of the IOMMU and returns a DMA address suitable for
programming the device to do DMA.  The unmap operation removes
this mapping from the translation table of the IOMMU.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27 14:47:57 -05:00
Mark Kettenis
40dbf03d7d iommu: Add IOMMU uclass
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default.  In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.

This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation.  Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-10-31 08:46:44 -04:00