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48066 commits

Author SHA1 Message Date
Jagan Teki
116e005cfd sf: Remove spansion_s25fss_disable_4KB_erase
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.

To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.

So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.

For this:
- Removed spansion_s25fss_disable_4KB_erase code
- Add SECT_4K for S25FS512S chip

Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
43ecc776ca sf: params: Add S25FS256S_64K spi flash support
Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.

In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.

To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.

So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.

Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
8e492951a8 sf: Add INFO6 flash_info macro
INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
0bdb7cb91f sf: Increase max id length by 1 byte
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for
few spansion flash families S25FS-S

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
ed363b53d0 sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
eccb6be068 sf: nr_sectors -> n_sectors
Rename nr_sectors as n_sectors to sync with Linux.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
f3bf2e5a56 sf: Cleanup spi_flash_info{}
- Proper tabs spaces
- Removed unnecessary
- Add comments in spi_flash_info members
- Add comments for spi_flash_info.flags

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:53 +05:30
Jagan Teki
523b4e37e8 sf: sandbox: Use JEDEC_MFR|ID in id exctract
Instead of extracting id's separately better
to use JEDEC_MFR|ID for code simplicity.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:52 +05:30
Jagan Teki
dda06a4328 sf: Simplify lock ops detection code
Simplify the flash_lock ops detection code and added
meaningful comment.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:52 +05:30
Jagan Teki
f790ca7c7d sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like
adding new flash_info attributes, update ID length bytes
and so on and more over it will sync to Linux way of defining
flash_info attributes.

- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-11-18 13:04:52 +05:30
Chris Packham
ebfa18cb3d spi: kirkwood_spi: implement mvebu_spi_set_mode()
Set the appropriate bits in the interface config register based
on the SPI_ mode flags.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
2016-11-18 13:04:52 +05:30
Tom Rini
c2cbd164ea Merge branch 'master' of http://git.denx.de/u-boot-mmc 2016-11-17 11:46:56 -05:00
Tom Rini
9e40ea04e9 Patch queue for efi - 2016-11-17
Highlights this time around:
 
   - x86 efi_loader support
   - hello world efi test case
   - network device name is now representative
   - terminal output reports modes correctly
   - fix psci reset for ls1043/ls1046
   - fix efi_add_runtime_mmio definition for x86
   - efi_loader support for ls2080
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2016-11-17

Highlights this time around:

  - x86 efi_loader support
  - hello world efi test case
  - network device name is now representative
  - terminal output reports modes correctly
  - fix psci reset for ls1043/ls1046
  - fix efi_add_runtime_mmio definition for x86
  - efi_loader support for ls2080
2016-11-17 11:46:45 -05:00
Alexander Graf
b99ebaf9f0 ls2080ardb: Convert to distro boot
Most new systems in U-Boot these days make use of the generic "distro"
framework which allows a user to have U-Boot scan for a bootable OS
on all available media types.

This patch extends the LS2080ARDB board to use that framework if the
hard coded NOR flash location does not contain a bootable image.

Signed-off-by: Alexander Graf <agraf@suse.de>
2016-11-17 14:18:56 +01:00
Alexander Graf
78d578422a armv8: fsl-layerscape: Add support for efi_loader RTS reset
When implementing efi loader support, we can expose runtime services
for payloads. One such service is CPU reset.

This patch implements RTS CPU reset support for layerscape systems.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-17 14:18:56 +01:00
Alexander Graf
5a37a2f014 armv8: ls2080a: Declare spin tables as reserved for efi loader
The efi loader code has its own memory map, so it needs to be aware where
the spin tables are located, to ensure that no code writes into those
regions.

Signed-off-by: Alexander Graf <agraf@suse.de>
2016-11-17 14:18:56 +01:00
Alexander Graf
215b1fb9fa ls2080ardb: Reserve DP-DDR RAM
The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's
rather claim it's a reserved region in the EFI memory map

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-17 14:18:55 +01:00
Alexander Graf
b7b8410a8f ls2080: Exit dpaa only right before exiting U-Boot
On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.

Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.

So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.

For existing boot scripts, nothing should change with this patch.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
[agraf: Fix x86 build]
2016-11-17 14:18:55 +01:00
Alexander Graf
97d014446c efi_loader: Fix efi_add_runtime_mmio definition
The efi_add_runtime_mmio prototype for disabled CONFIG_EFI_LOADER
was different from the enabled one. Sync them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2016-11-17 14:18:55 +01:00
Alexander Graf
441a2306ab efi_loader: Disable PSCI reset for ls1043 and ls1046
The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement
for reset. Don't enable generic PSCI reset code on them.

Signed-off-by: Alexander Graf <agraf@suse.de>
2016-11-17 14:18:50 +01:00
Alexander Graf
69bd459d34 efi_loader: AArch64: Run EFI payloads in EL2 if U-Boot runs in EL3
Some boards decided not to run ATF or other secure firmware in EL3, so
they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
though - it only knows about EL2 and EL1. So if we see that we're running
in EL3, let's get into EL2 to make payloads happy.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-17 11:52:21 +01:00
Heiko Schocher
45a3ad81fa mx35: adjust default environment for flea3 board
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
2016-11-16 20:53:55 +01:00
Stefano Babic
322ac5f1d5 mx35: add GPIO setup on flea3 board
Hardware revision "e" of the board introduces
a GPIO to reduce power consumption in stand-by mode.
This must be enable (active low) at the startup
for normal behaviour.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
2016-11-16 20:53:55 +01:00
Stefano Babic
146fff347a mx35: factorize SDRAM setup in flea3
Drop local function to setup SDRAM controller
and use the common one for i.MX35.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
2016-11-16 20:53:55 +01:00
Heiko Schocher
72c1015307 mx35: add DT support to flea3 board
Signed-off-by: Heiko Schocher <hs@denx.de>
2016-11-16 20:53:55 +01:00
Peng Fan
97c16dc8bf imx: mx6ull: update the REFTOP_VBGADJ setting
According to design team, we need to set REFTOP_VBGADJ
in PMU MISC0 according to the REFTOP_TRIM[2:0] fuse. the
actually table is as below:

  '000" - set REFTOP_VBGADJ[2:0] to 3'b000
  '001" - set REFTOP_VBGADJ[2:0] to 3'b001
  '010" - set REFTOP_VBGADJ[2:0] to 3'b010
  '011" - set REFTOP_VBGADJ[2:0] to 3'b011
  '100" - set REFTOP_VBGADJ[2:0] to 3'b100
  '101" - set REFTOP_VBGADJ[2:0] to 3'b101
  '110" - set REFTOP_VBGADJ[2:0] to 3'b110
  '111" - set REFTOP_VBGADJ[2:0] to 3'b111

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
2016-11-16 20:53:55 +01:00
Ye.Li
27e3a3c7f8 imx: mx6sx: Disable ENET clock before switching clock parent
Need to gate ENET clock when switching to a new clock parent, because
the mux is not glitchless.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2016-11-16 20:53:55 +01:00
Maxime Ripard
91f839d2d3 sunxi: sina33: Enable the LCD
The SinA33 comes with an optional 7" display. Enable it in the
configuration.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-11-16 13:30:18 +09:00
Maxime Ripard
53c37f625d sunxi: sina33: Enable the eMMC
The SinA33 has an 4GB Toshiba eMMC connected to the MMC2 controller.
Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-11-16 13:30:17 +09:00
Maxime Ripard
fb01318467 mmc: sunxi: Enable 8bits bus width for sun8i
The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
support for those too.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-11-16 13:30:17 +09:00
Maxime Ripard
a9003dc641 mmc: Retry the switch command
Some eMMC will fail at the first switch, but would succeed in a subsequent
one.

Make sure we try several times to cover those cases. The number of retries
(and the behaviour) is currently what is being used in Linux.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-11-16 13:30:17 +09:00
Bharat Kumar Gogada
688d1be5ba ARM64: zynqmp: Adding prefetchable memory space to pcie
Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:41 +01:00
Kedareswara rao Appana
d33046aa2a ARM64: zynqmp: Add clocks for LPDDMA
Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.

xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2

This patch fixes this issue.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Kedareswara rao Appana
6af5773700 ARM64: zynqmp: Add description for LPDDMA channel usage
LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.

Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Michal Simek
b976fd636e ARM64: zynqmp: Use 64bit size cell format for main amba bus
Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Naga Sureshkumar Relli
5534480a65 ARM64: zynqmp: Add ocm node in dtsi
This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Anurag Kumar Vulisha
db6c62e1b9 ARM64: zynqmp: Add device tree properties for ZynqMP GT core
This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Michal Simek
571f531796 Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"
This reverts commit bd750e7a6c

Implemented the new workaround for auto tuning based on
zynqmp compatible string, so removed the 'broken-tuning'
property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Sai Krishna Potthuri
0488a5e117 ARM64: zynqmp: change sdhci compatible string.
This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.

Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Michal Simek
ba6ad317d0 ARM64: zynqmp: List all SMMU ids
Add SMMU description for all tested IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Nava kishore Manne
d64e43f1d4 ARM64: zynqmp: Add support for zynqmp fpga manager
Add support for zynqmp fpga manager.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:40 +01:00
Naga Sureshkumar Relli
aaf232f348 ARM64: zynqmp: Add cortexa53 edac node
This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Michal Simek
7418b7c6ea Revert "ARM64: zynqmp: Add serdes address space dp driver"
This reverts commit 786db82bd5.

Since we are using serdes driver , no need of mapping serdes register
space into DP driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Hyun Kwon
bfe279803f ARM64: zynqmp: drm: Add DMA index
Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Michal Simek
9e826b6868 ARM64: zynqmp: Sync gpio node properties
Keep dtsi in sync with mainline kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Michal Simek
c0f277f306 ARM64: zynqmp: Remove xlnx,id property
Remove unused xlnx,id property because it is not the part of
DT binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Bharat Kumar Gogada
7d6ca73ab9 ARM64: zynqmp: pci: Updating device tree as per upstream
Updating required device tree changes as per mainlined driver
from 4.6 kernel.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Filip Drazic
a4d7d56037 ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain
Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).

This patch adds support for assigning more than one PM ID to
a single PM domain.

Updated documentation accordingly.

Assigned pixel processors PM IDs to GPU PM domain.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Filip Drazic
2af3932fca ARM64: zynqmp: DT: Add PM domains for GPU and PCIE
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00
Filip Drazic
7780a869d7 ARM64: zynqmp: DT: Remove unused PM domains for PLL
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-11-15 15:30:39 +01:00