Commit graph

14 commits

Author SHA1 Message Date
Masahiro Yamada
c74b8fcdd7 arm, nds32, sh: remove useless ioremap()/iounmap() defines
These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere.  Remove.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-14 18:22:25 -04:00
Purna Chandra Mandal
f968467785 arm: add missing writes[bwql], reads[bwql].
ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.

Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-04-10 17:18:41 +02:00
Aneesh Bansal
f4f0b7403a Data types defined for 64 bit physical address
Data types and I/O functions have been defined for
64 bit physical addresses in arm.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-10-29 10:33:57 -07:00
Wang Huan
d60a2099a2 arm: ls102xa: Add Freescale LS102xA SoC support
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.

Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that have been optimized for high
reliability and pack the highest level of integration
available for sub-3 W embedded communications processors
with Layerscape architecture and with a comprehensive
enablement model focused on ease of programmability.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2014-09-08 10:30:32 -07:00
Jeroen Hofstee
8863aa5c98 ARM:asm:io.h use static inline
When compiling u-boot with W=1 the extern inline void for
read* is likely causing the most noise. gcc / clang will
warn there is never a actual declaration for these functions.
Instead of declaring these extern make them static inline so
it is actually declared.

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-08-29 15:50:43 -04:00
York Sun
8340e7ac86 driver/ddr: Fix DDR4 driver for ARM
Previously the driver was only tested on Power SoCs. Different barrier
instructions are needed for ARM SoCs.

Signed-off-by: York Sun <yorksun@freescale.com>
2014-07-22 16:25:54 -07:00
J. German Rivera
0d031e046c Added 64-bit MMIO accessors for ARMv8
This is needed for accessing peripherals with 64-bit MMIO registers,
from ARMv8 processors.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
2014-07-03 08:40:31 +02:00
Simon Glass
ad827e1649 arm: Support iotrace feature
Support the iotrace feature for ARM, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-06-20 11:54:40 -06:00
David Feng
0ae7653128 arm64: core support
Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>

Signed-off-by: David Feng <fenghua@phytium.com.cn>
2014-01-09 16:08:44 +01:00
Wolfgang Denk
495df3bad9 ARM: fix write*() I/O accessors
Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice.  This
breaks code like used here (from "drivers/net/dnet.c"):

	for (i = 0; i < wrsz; i++)
		writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>
2011-02-21 08:30:55 +01:00
Alexander Holler
3c0659b535 ARM: Avoid compiler optimization for readb, writeb and friends.
gcc 4.5.1 seems to ignore (at least some) volatile definitions,
avoid that as done in the kernel.

Reading C99 6.7.3 8 and the comment 114) there, I think it is a bug of that
gcc version to ignore the volatile type qualifier used e.g. in __arch_getl().
Anyway, using a definition as in the kernel headers avoids such optimizations when
gcc 4.5.1 is used.

Maybe the headers as used in the current linux-kernel should be used,
but to avoid large changes, I've just added a small change to the current headers.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Alessandro Rubini <rubini-list@gnudd.com>
Tested-by: Thomas Weber <weber@corscience.de>
Acked-by: Alexander Holler <holler@ahsoftware.de>
Tested-by: Alexander Holler <holler@ahsoftware.de>
2011-02-02 00:54:44 +01:00
Marek Vasut
560639806d ARM: Define __raw_readX and __raw_writeX
These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-08-07 22:34:25 +02:00
Terry Lv
95bc39e848 ARM: fix bug in macro __arch_ioremap.
Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-22 22:33:06 +02:00
Peter Tyser
819833af39 Move architecture-specific includes to arch/$ARCH/include/asm
This helps to clean up the include/ directory so that it only contains
non-architecture-specific headers and also matches Linux's directory
layout which many U-Boot developers are already familiar with.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-04-13 09:13:12 +02:00
Renamed from include/asm-arm/io.h (Browse further)