Commit graph

105 commits

Author SHA1 Message Date
Wolfgang Denk
6adf61dc4c Prepare for v1.3.3-rc3
Update ChNAGELOG, minor white space cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-04 12:10:33 +02:00
Sascha Laue
58b575e575 lwmon5: fix offset error in sysmon0 POST
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-30 22:25:15 +02:00
Sascha Laue
e7419b243a lwmon5: fix manual merge error in POST
Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-04-30 21:54:32 +02:00
Wolfgang Denk
ea6f66894f post/board/lwmon5/sysmon.c: fix manual merge error.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-29 21:33:08 +02:00
Yuri Tikhonov
18ec19e4aa POST: fix Makefiles for mpc8xx, lwmon, and netta POSTs.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-04-29 13:13:22 +02:00
Sascha Laue
6aee00f5e6 lwmon5: update dsPIC POST spezification
The specification for the lwmon5 board dsPIC POST got changed.
Also add defines for the temperatures  and voltages.

Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
2008-04-28 21:31:41 +02:00
Sascha Laue
3e4615ab7f Fix watchdog POST for lwmon5
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.

Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-28 21:15:46 +02:00
Kumar Gala
03c6cd39f9 post: Fix building with O=
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-28 00:55:04 +02:00
Wolfgang Denk
19cf2ec90d post/Makefile: make sure to use the correct flags
ARFLAGS was not set, which caused "ppc_8xx-ar: creating libgenpost.a"
messages to be printed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26 01:25:39 +02:00
Wolfgang Denk
7ed4011733 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-26 00:34:42 +02:00
Wolfgang Denk
4b7a6dd896 Merge branch 'master' of /home/wd/git/u-boot/lwmon5
Conflicts:

	common/cmd_bootm.c
	common/cmd_log.c
	include/common.h
	post/board/lwmon5/Makefile
	post/board/lwmon5/dsp.c
	post/board/lwmon5/dspic.c
	post/board/lwmon5/fpga.c
	post/board/lwmon5/gdc.c
	post/board/lwmon5/sysmon.c
	post/board/lwmon5/watchdog.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-25 11:32:01 +02:00
Yuri Tikhonov
2d2b994a30 POST: move CONFIG_POST to Makefiles
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.

To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:40:19 +02:00
Yuri Tikhonov
0a51e9248e POST: preparations for moving CONFIG_POST to Makefiles
Remove CONFIG_POST ifdefs from the post/ source files.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:38:38 +02:00
Sascha Laue
3dfd4aab92 Fix watchdog POST for lwmon5
If the hardware watchdog detects a voltage error, the watchdog sets
GPIO62 to low. The watchdog POST has to detect this low level.

Signed-off-by: Sascha Laue <leglas0@legpc180.leg.liebherr.i>
2008-04-13 23:22:34 -07:00
Wolfgang Denk
aa6f6d171a Coding Style cleanyp; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-26 00:52:10 +01:00
Yuri Tikhonov
ff2bdfb2c1 lwmon5 SYSMON POST: fix handling of negative temperatures
Fix errors in the LWMON5 Sysmon POST for negative temperatures.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-25 00:14:46 +01:00
Wolfgang Denk
6887cb6817 Merge branch 'master' of /home/wd/git/u-boot/work 2008-03-22 23:27:43 +01:00
Yuri Tikhonov
86aea3eaef LWMON5: fix dsPIC POST
Add test for DPIC_SYS_ERROR_REG to be zero in the LWMON5 dsPIC POST.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com> ---
2008-03-22 23:26:08 +01:00
Wolfgang Denk
81a0ac62ea lwmon5 POST: remove unreachable code
plus some coding style cleanup

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-03-20 22:01:38 +01:00
Yuri Tikhonov
b73a19e160 LWMON5: POST RTC fix
Modify the RTC API to provide one a status for the time reported by
the rtc_get() function:
  0 - a reliable time is guaranteed,
< 0 - a reliable time isn't guaranteed (power fault, clock issues,
      and so on).

The RTC chip drivers are responsible for providing this info if the
corresponding chip supports such functionality. If not - always
report that the time is reliable.

The POST RTC test was modified to detect the RTC faults utilizing
this new rtc_get() feature.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-20 21:48:46 +01:00
Yuri Tikhonov
23e20aa648 lwmon5: Fix register test logic to match the specific GDC h/w.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:49 +01:00
Yuri Tikhonov
46bc0a9387 Fix backlight in the lwmon5 POST.
Backlight was switched on even when temperature was too low.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
f694e32f93 Some fixes to dspic, fpga, and gdc post tests for lwmon5. Disable external watch-dog for now.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
b428f6a8c6 The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
8f15d4addd The patch adds new POST tests for the Lwmon5 board. These are:
* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:47 +01:00
Yuri Tikhonov
c2ed33efbf Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
2008-03-18 22:24:47 +01:00
Yuri Tikhonov
3a5d1e7f13 lwmon5: Fix register test logic to match the specific GDC h/w.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:05:37 +01:00
Yuri Tikhonov
0f855a1f05 Fix backlight in the lwmon5 POST.
Backlight was switcehd on even when temperature was too low.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:04:06 +01:00
Yuri Tikhonov
603f194e5a Some fixes to dspic, fpga, and gdc post tests for lwmon5.
Disable external watch-dog for now.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
e262efe357 The patch introduces the CRITICAL feature of POST tests. If the test
marked as POST_CRITICAL fails then the alternative, post_critical,
boot-command is used. If this command is not defined then U-Boot
enters into interactive mode.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
65b20dcefc The patch adds new POST tests for the Lwmon5 board.
These are:

* External Watchdog test;
* dsPIC tests;
* FPGA test;
* GDC test;
* Sysmon tests.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Yuri Tikhonov
8dc3b2303d Enable CODEC POST with CFG_POST_CODEC rather than with CFG_POST_DSP.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
2008-03-18 21:59:23 +01:00
Stefan Roese
84a999b6cd ppc4xx: program_tlb now uses 64bit physical addess
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Anatolij Gustschin
44b4dbed41 Fix warnings while compilation of post/drivers/memory.c
Fix warnings while compilation with new gcc in eldk-4.2

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-02 21:42:20 +01:00
Anatolij Gustschin
60ec654c5e POST: Disable cache while SPR POST
Currently (since commit b2e2142c) u-boot crashes on
sequoia board while SPR test if CONFIG_4xx_DCACHE is
enabled. This patch disables the cache while SPR test.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2008-03-02 21:33:51 +01:00
Yuri Tikhonov
928d1d77f8 Fix CPU POST test failure
The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the
ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered
by it. The gcc-4.2 with its more aggressive optimization exposes this fact.
This patch just saves the CR value before running the test code, so allowing
it to do anything it wants with CR.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
--
2008-02-21 11:25:47 +01:00
Larry Johnson
8dafa87476 Add attribute POST_PREREL to ECC memory POST
Signed-off-by: Larry Johnson <lrj@acm.org>
2008-02-07 00:22:59 +01:00
Larry Johnson
4b3cc6ece9 ppc4xx: Refactor ECC POST for AMCC Denali core
The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board.  Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.

This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-01-16 11:23:33 +01:00
Niklaus Giger
17bef68097 ppc_4xx: Fix post spr.c for PPC405
post/cpu/ppc4xx/spr.c contained a few checks for registers only present
for PPC440 and derivates processor.

Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
2008-01-14 15:52:52 +01:00
Stefan Roese
b2e2142c50 POST: Execute SPR test after relocation
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses
self modifying code and this doesn't work with stack in d-cache, since
I can't move the code from d-cache to i-cache. We move the SPR test to
be executed a little later, after relocation. Then stack is located in
SDRAM and this self-modifying code is no problem anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-01-09 10:38:58 +01:00
Larry Johnson
0d9cdeac1d Cosmetic changes to ECC POST for AMCC Denali core
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:35 +01:00
Stefan Roese
2e583d6c81 ppc4xx: Fix compilation problem in 405 cache POST test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:35 +01:00
Stefan Roese
d91722102c ppc4xx: Fix problem in 44x cache POST routine
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:34 +01:00
Stefan Roese
7812bc4a2e ppc4xx: Fix lwmon5 compilation problem
Now that the 440EPx ECC test is not board specific anymore
remove this Makefile.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:34 +01:00
Larry Johnson
a724a9b40c Fix/enhance ECC POST for 440EPx/GRx
This patch allows the ECC POST to be used for different boards with the
PPC440 Denali SDRAM controller.  Modifications include skipping the test
if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization
to prevent timing errors.

Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:33 +01:00
Larry Johnson
454a6cf8d4 PPC4xx: Move/rename ECC POST for 440EPx/GRx
Signed-off-by: Larry Johnson <lrj@acm.org>
2007-12-27 19:35:33 +01:00
Matthias Fuchs
c29d2d3680 ppc4xx: use correct io accessors for 4xx ethernet POST
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2007-12-27 19:35:33 +01:00
Stefan Roese
3db93b8bed ppc4xx: Enable CPU POST test for 4xx with dcache enabled
Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
f71b2888b4 ppc4xx: Change 4xx POST ethernet test to handle cached memory too
This patch enables the 4xx EMAC POST driver to work too, when dcache is
enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
a268590406 ppc4xx: Remove temporary TLB entry in POST cache test only for 440
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00