Commit graph

7 commits

Author SHA1 Message Date
Ye Li
07816f086c imx: ahab: Move imx9 and imx8ulp AHAB support together
Use common file ele_ahab.c for i.MX9 and iMX8ULP AHAB support, since
both of them use same sentinel ELE APIs

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 22:27:38 +02:00
Ye Li
f3272355cd imx: imx8ulp: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-03-29 20:15:41 +02:00
Ye Li
5579d66e37 imx: imx8ulp: Add M33 handshake functions
Add functions to check if M33 image is booted and handshake with M33
image via MU. A core notifies M33 to start init by FCR F0, then wait
M33 init done signal by checking FSR F0.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-04-12 17:33:56 +02:00
Alice Guo
0f9b10aaba imx8ulp: clock: Support to enable/disable the ADC1 clock
This patch implements enable_adc1_clk() to enable or disable the ADC1
clock on i.MX8ULP.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-02-05 13:38:39 +01:00
Peng Fan
4b9423e6f2 imx8ulp: move struct mu_type to common header
Move struct mu_type to common header to make it reusable by upower and
S400

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Peng Fan
a84dab4f70 arm: imx8ulp: add clock support
Add i.MX8ULP clock support

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:51 +02:00
Peng Fan
9ef89ea9b0 arm: imx: basic i.MX8ULP support
Add basic i.MX8ULP support

For the MMU part, Using a simple way the calculate the MMU size to avoid
default heavy calcaulation. And align address and size in the table
settings to 2MB or 4GB as much as possible. So we can reduce the 4K page
allocations in MMU table which will spends much time in create the
page table

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09 14:46:50 +02:00