Commit graph

7 commits

Author SHA1 Message Date
Dave Gerlach
adbe138a90 arm: dts: k3-am642-r5-evm: Mark memory with u-boot, dm-spl
Mark the memory node with u-boot,dm-spl so we can use it from early SPL.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-04 19:02:04 -04:00
Hari Nagalla
3d64cffa91 arm: dts: k3-am64: Add support for ESM device nodes
Enable access to ESM0 configuration space and add Main ESM0 and MCU ESM
nodes to the AM64 device tree.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Aswath Govindraju
7803a5bda9 arm: dts: k3-am642-*-evm: Add USB support
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is
connected with a resistor divider in between. USB0_DRVVBUS pin is muxed
between USB0_DRVVBUS and GPIO1_79 signals.

Add the corresponding properties and set the pinmux mode for USB subsystem
in the evm dts file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-7-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Lokesh Vutla
e922b5a963 arm: dts: k3-am642-r5-evm: Do not use power-domains for I2C
I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for I2C.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12 16:32:44 +05:30
Nishanth Menon
ab4c072ddd arm: dts: k3-am642-r5-evm: Add GPIO DDR VTT regulator
Add DDR VTT regulator.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:31:16 +05:30
Dave Gerlach
fe0f3e3697 arm: dts: k3-am642: Add ddr node
Introduce ddr node for am642 needed for all ddr configurations.

Also, introduce the 1600MTs DDR4 configuration that is supported on the
am642-evm.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:31:15 +05:30
Dave Gerlach
b6059ddc45 arm: dts: k3-am642: Add r5 specific dt support
Add initial support for dt that runs on r5.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:30:28 +05:30