Commit graph

6 commits

Author SHA1 Message Date
Georgi Vlaev
e7356f08e9 arm: dts: k3-am642-*: Mark the memory node with u-boot, dm-spl
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
for ram and bank init") ddr_init() and dram_bank_init() have
switched to fdtdec for getting the memory configuration from
the am64xx dts files instead of using hardcoded values. This
requires an accessible memory node in SPL as we already have
in k3-am642-r5-evm.dts.

Make the memory node accessible in A53 SPL for both am642-sk
and am642-evm and in am642-sk R5 SPL.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-26 10:32:26 -04:00
Hari Nagalla
3d64cffa91 arm: dts: k3-am64: Add support for ESM device nodes
Enable access to ESM0 configuration space and add Main ESM0 and MCU ESM
nodes to the AM64 device tree.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2022-04-04 19:02:04 -04:00
Vignesh Raghavendra
afe5163449 ARM: dts: k3-am642-sk: Disable cpsw_port1 in SPL
ROM supports cpsw_port2 for Ethernet boot and SPL stages continue to
download images on the same port, therefore there is no need to enable
cpsw_port1. Disable the same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-01-28 17:58:41 -05:00
Vignesh Raghavendra
ef7be5a07b ARM: dts: K3-am642-r5-sk: Enable Second CPSW port in R5/A53 SPL
Enable Second Ethernet port on which ROM support Ethboot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2022-01-15 21:44:50 -05:00
Kishon Vijay Abraham I
326ee2b0bc arm: dts: am642-sk: Add and Enable USB SuperSpeed Host Port in SPL
Add and Enable USB SuperSpeed Host Port in SPL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17 17:09:47 -05:00
Lokesh Vutla
a66b9149a3 arm: dts: am642-r5-sk: Add r5 specific dts
Add R5 specific dts for AM64 SK

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2021-05-12 16:36:38 +05:30