Sometimes when debugging tests it is useful to keep the input and output
directories so they can be examined later. Add an option for this and
update the binman tests to support it. This affects both the test class
and the tearDown() function called after each test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the -v flag is ignored with tests, so that (for example) -v2
does not have any effect. Update binman to pass this flag through to tests
so that they work just like running binman normally, except in a few
special cases where we are actually testing behaviour with different
levels of verbosity.
Signed-off-by: Simon Glass <sjg@chromium.org>
We currenty support using the ELF file in U-Boot proper and SPL, but not
TPL. Add this as it is useful both with sandbox and for CBFS to allow
adding TPL as a 'stage'.
Signed-off-by: Simon Glass <sjg@chromium.org>
The -D option enables debug mode, but we only need to add -D to the
command line once. Drop the duplicate code. Also drop the comment about
enabling debugging since this can be done with -D.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add utility functions to compress and decompress using lz4 and lzma
algorithms. In the latter case these use the legacy lzma support favoured
by coreboot's CBFS.
No tests are provided as these functions will be tested by the CBFS
tests in a separate patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present text entries use an indirect method to specify the text to use,
with a label pointing to the text itself.
Allow the text to be directly written into the node. This is more
convenient in cases where the text is constant.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function always sets both the offset and the size of
entries. But in some cases we want to set only one or the other, for
example with the forthcoming ifwi entry, where we only set the offset.
Update the function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present having a descriptor means that there is an ME (Intel
Management Engine) entry as well. The descriptor provides the ME location
and assumes that it is present.
For some SoCs this is not true. Before providing the location of a
potentially non-existent entry, check if it is present.
Update the comment in the ME entry also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman requires that the Intel descriptor has an explicit
offset. Generally this is 0 since the descriptor is at the start of the
image. Add a default to handle this, so users don't need to specify the
offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Code coverage tests fail on binman due to dist-packages being dropped from
the python path on Ubuntu 16.04. Add them in so that we can find the
elffile module, which is required by binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which decodes an ELF file, working out where in memory each
part of the data should be written.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to create an ELF file for testing purposes, with just the
right attributes used by the test. Add a function to handle this, along
with a test that it works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
If tests are skipped we should ideally exit with an error, since there may
be a missing dependency. However at present this is not desirable since it
breaks travis tests. For now, just report the skips.
Signed-off-by: Simon Glass <sjg@chromium.org>
FD is a bit confusing so write this out in full. Also avoid splitting the
string so that people can grep for the error message more easily.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes tools used by binman may not be in the normal PATH search path,
such as when the tool is built by the U-Boot build itself (e.g. mkimage).
Provide a way to specify an additional search path for tools. The flag
can be used multiple times.
Update the help to describe this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
If kwargs contains raise_on_error then this function generates an error
due to a duplicate argument. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some Intel SoCs from about 2016 boot using an internal microcontroller via
an 'IFWI' image. This is a special format which can hold firmware images.
In U-Boot's case it holds u-boot-tpl.bin.
Add this tool, taken from coreboot, so that we can build bootable images
on apollolake SoCs.
This tool itself has no tests. Some amount of coverage will be provided by
the binman tests that use it, so enable building the tool on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
* Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
* Address errors of type -Werror=address-of-packed-member when building
with GCC9.1
* Fix an error when adding memory add addres 0x00000000.
* Rework some code comments for Sphinx compliance.
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Merge tag 'efi-2019-10-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for v2019.10-rc1 (2)
* Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
* Address errors of type -Werror=address-of-packed-member when building
with GCC9.1
* Fix an error when adding memory add addres 0x00000000.
* Rework some code comments for Sphinx compliance.
Backport and squash below Linux v5.2 commits:
Commit id * Summary line
da3e1c57caf93e [1] soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
b5eb730e031aca [1] soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
3961d355dfb512 dt-bindings: power: r8a77965: Remove non-existent A3IR power domain
(*) Patch id mismatch between Linux and U-Boot commit
[1] Dropped changes in drivers/soc/renesas/r8a77970-sysc.c,
since the file doesn't exist in U-Boot.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
In spite of the summary line, U-Boot commits [1-2] seem to have
aligned the U-Boot PFC tables to Linux v5.1 rather than to v5.0, since
they also imported the Linux 5.1 commits listed in [3].
What current commit tries to accomplish is to align the Gen2 and Gen3
pinctrl tables to Linux v5.2. Importing these updates in two steps
as done before (i.e. separately for Gen2 and Gen3) is somewhat difficult
due to Linux commits like [5-6] which atomically update both Gen2/3
platforms and whose breakdown would not be easily possible.
The detailed list of Linux commits squashed into this U-Boot patch is
shown in [4]. The second column in [4] depicts the patch id mismatch
between the original Linux and the resulted U-Boot commit. The
exclamation mark means that manual conflict resolution was involved
during cherry picking Linux commit into U-Boot repository (this is
mainly caused by dropped changes in files like pfc-r8a7795-es1.c and
pfc-r8a77980.c which are missing in U-Boot).
This patch has been applied on top of v2019.07-rc4-155-g8754656680b6 and
boot-tested on:
- H3-ES2.0-Salvator-X
- M3-ES1.1-Salvator-XS
- M3N-ES1.1-ULCB
[1] 8719ca8113 ("pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0")
[2] a6a743df24 ("pinctrl: renesas: Synchronize Gen2 tables with Linux 5.0")
[3] Linux 5.1 commits already contained in [1-2]:
79dbbdbeccc6784 pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
729257d674bc2e6 pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
b9fd50488b4939c pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
a4b0350047f1b10 pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
fdbbd6b74c9278f pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions
16978e7d40f73be pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions
86c045c2e4201e9 pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3
b8ba194ca5f4ca2 pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups
81c585c96b7dd47 pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions
08b7e2112a9b19c pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions
99fdb920f5534d1 pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions
85ccae133bde425 Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins"
f7d8b568e204d29 pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability
5219aa33caec2f7 pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering
3e3eebeacad79bd pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering
7219a4b64520873 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2
699c7d1346fbef6 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0
[4] Linux 5.2 commits backported and squashed into this U-Boot patch
Linux commit id Linux commit summary line
9925e8795726801 pinctrl: sh-pfc: Validate pins/marks in pin groups at build time
f83f97684a737f6 pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
5e8588c86d71e78 pinctrl: sh-pfc: Validate fixed-size field widths at build time
1c5c1101755c5ed pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers
3df892fdbfe6919 pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers
dcd24e098d8df8b pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions
2cee6cb290ab30f pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions
d92ee9cf8ec8d7f ! pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume
efca8da0c5fcc7f ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro
69f7be1c6314fb0 ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro
19b593a1cf068ef ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro
c481c8178420b8c pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields
fa4d36712f20e24 ! pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields
360328c7dc15f48 pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation
943ff71281c6ce4 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N
e167d723e1a472d pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D
e87882eb9be10b2 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2
5671f8e0270ad5e ! pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions
662dc924a05e9df ! pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin
624a7a12cc0cc77 ! pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions
a040f3dec8eb7b1 pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C}
e551122cdb7fcb9 pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF
baaa2effc684e49 pinctrl: sh-pfc: r8a77970: Fix spacing
f05603fa6aa3043 pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data
0a042b355e60269 pinctrl: sh-pfc: r8a77965: Add I2C{0,3,5} pins, groups and functions
[5] efca8da0c5fcc7 ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro")
[6] 69f7be1c6314fb ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Update "dma-ranges" DT property of all PCIe controllers in the system
with the up-to-date DRAM layout. This allows the PCIe controller take
full advantage of all the available DRAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
The generic code in common/spl/spl.c allows TPL/SPL banners to be
silenced by unsetting CONFIG_TPL_BANNER_PRINT or CONFIG_SPL_BANNER_PRINT
respectively. However, arch/arm/mach-rockchip/tpl.c prints this banner
unconditionally.
Fix the rockchip-specific tpl.c so that the TPL banner depends on
CONFIG_TPL_BANNER_PRINT in the same way as the generic code.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
If CONFIG_DEBUG_UART is set but CONFIG_TPL_SERIAL_SUPPORT is not, the
serial output should be available in SPL and full U-Boot, but not built
in TPL. However, the rockchip tpl.c instead fails to compile with
undefined references to the debug UART.
Instead, initialise the debug UART and print the TPL banner only if both
CONFIG_DEBUG_UART and CONFIG_TPL_SERIAL_SUPPORT are set.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.
These flashes are tested on LX2160ARDB and LS1028ARDB respectively
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add RTCAPB and RTC clock support.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch introduces support of Cortex-M4 remote processor for STM32
MCU and MPU families.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
