Commit graph

76531 commits

Author SHA1 Message Date
Ram Narayanan
d7b1d8259e mtd: spi-nor-ids: Add support for W25Q01JV
Adds support for Winbond's new 128MB spi nor flash.

datasheet: https://www.winbond.com/resource-files/W25Q01JV%20SPI%20RevC%2005032021%20Plus%20dummy.pdf

Signed-off-by: Ram Narayanan <ramnara@linux.microsoft.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-16 12:58:47 +05:30
Tom Rini
5b20efeafe Clock patches for v2022.01-rc3
This adds better logging support for many CCF drivers, and clarifies some
 documentation regarding clk_get_rate.
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Merge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock patches for v2022.01-rc3

This adds better logging support for many CCF drivers, and clarifies some
documentation regarding clk_get_rate.
2021-12-15 14:51:44 -05:00
Patrick Delaunay
560e1e0050 clk: define LOG_CATEGORY for generic and ccf clocks
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.

This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
Patrick Delaunay
572c446e98 clk: cosmetic: reorder include files
Reorder include files in the U-Boot expected order:

the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.

It is a preliminary step for next patch.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:16 -05:00
Giulio Benetti
9e578f6340 clk: fix clk_get_rate() documentation
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-12-15 12:16:15 -05:00
Tom Rini
e09ca91cfa - enable RPi Zero 2 W
- fix MMC numbering issue
 - Update link to documentation
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Merge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi

- enable RPi Zero 2 W
- fix MMC numbering issue
- Update link to documentation
2021-12-15 11:49:30 -05:00
Tom Rini
5a59f634e9 Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
  setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
2021-12-15 07:14:20 -05:00
Pali Rohár
fed5beca18 arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.

In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.

Fixes: cb056005dc ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Pali Rohár
a48e4287d6 pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.

In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.

Fixes: a7b61ab58d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Marek Behún
e967c84a6d pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-12-15 08:57:36 +01:00
Tom Rini
cfbd2bc695 - enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
   - increase USB power-good delay
   - add update_sf script to install U-Boot into SF
   - increase PHY auto-negotiation timeout to 20 seconds
   - fix SoM and board coding strap GPIO handling
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Merge tag 'u-boot-stm32-20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm

- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling

# gpg verification failed.
2021-12-13 10:20:25 -05:00
Marek Vasut
5c592b636a ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:22 +01:00
Marek Vasut
98fe251a24 ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:11 +01:00
Marek Vasut
7c870f8d70 ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:34:04 +01:00
Marek Vasut
e1d7b0b9c5 ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:59 +01:00
Marek Vasut
44beea2845 ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-12-13 14:33:53 +01:00
Marek Vasut
e8e66801bd ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-12-13 14:33:47 +01:00
Tom Rini
026c010c4a Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- A few clean ups for the RZG2
2021-12-13 07:11:09 -05:00
Adam Ford
d5f1beb058 configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
dcbf1145e2 ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
61b3a0101a arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other.  Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
1eaf61c84d arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Adam Ford
182754f43a net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.

Signed-off-by: Adam Ford <aford173@gmail.com>
2021-12-13 00:37:28 +01:00
Tom Rini
a1c01b17c5 Pull request efi-2022-01-rc4-2
UEFI:
 
 * correctly handle missing TPM device
 * prepare for block devices for U-Boot as EFI app
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Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2022-01-rc4-2

UEFI:

* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app

# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4
2021-12-10 07:58:43 -05:00
Simon Glass
d8063dc373 efi: Add a media/block driver for EFI block devices
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:

- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
    EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device

The new driver is more 'normal', just requiring its platform data be set
up in advance.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
42b7f4212a efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.

This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.

If the two uclasses can be unified, is left to future redesign.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Simon Glass
2abd8d1c99 efi: Rename UCLASS_EFI and IF_TYPE_EFI
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
f9b51dcf29 efi_loader: correctly handle no tpm device error
When the TCG2 protocol is installed in efi_tcg2_register(),
TPM2 device must be present.
tcg2_measure_pe_image() expects that TCP2 protocol is installed
and TPM device is available. If TCG2 Protocol is installed but
TPM device is not found, tcg2_measure_pe_image() returns
EFI_SECURITY_VIOLATION and efi_load_image() ends with failure.

The same error handling is applied to
efi_tcg2_measure_efi_app_invocation().

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
9e32bf9362 efi_loader: check tcg2 protocol installation outside the TCG protocol
There are functions that calls tcg2_agile_log_append() outside
of the TCG protocol invocation (e.g tcg2_measure_pe_image).
These functions must to check that TCG2 protocol is installed.
If not, measurement shall be skipped.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Masahisa Kojima
54bec17f6b efi_loader: efi_tcg2_register returns appropriate error
This commit modify efi_tcg2_register() to return the
appropriate error.
With this fix, sandbox will not boot because efi_tcg2_register()
fails due to some missing feature in GetCapabilities.
So disable sandbox if EFI_TCG2_PROTOCOL is enabled.

UEFI secure boot variable measurement is not directly related
to TCG2 protocol installation, tcg2_measure_secure_boot_variable()
is moved to the separate function.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-12-09 11:43:25 -08:00
Alexander Dahl
446266b024 doc: usage: Fix command in fdt overlay apply sequence
Literally adhering to the docs gave this wrong output:

    U-Boot> setenv fdtaddr 0x87f00000
    U-Boot> fdtaddr $fdtaddr
    Unknown command 'fdtaddr' - try 'help'

Fixes: d80162cfc5 ("doc: Document how to apply fdt overlays")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-12-09 11:43:25 -08:00
Tom Rini
1530ad5bec Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
This fixes two regressions: eMMC operation on boards with WiFi (so using
three MMC devices), and a repeated wrong error message in USB gadget
mode (fastboot, ums).
2021-12-09 08:43:30 -05:00
Andre Przywara
fbd9207e7f sunxi: Remove misleading USB-OTG charger message
The sunxi MUSB glue driver has some code to check for external VBUS
presence when it's going to use the MUSB host mode, and it warns if
there is VBUS provided through the cable (in sunxi_musb_enable()).

This code was apparently copied to the USB gadget detection code
(g_dnl_board_usb_cable_connected()), but here we actually *expect*
external VBUS power, so a warning is wrong and confusing.
So far this message rarely triggered, but a recent patch (6fa41cdd19)
changed this:
===========================
=> ums 0 mmc 2
UMS: LUN 0, dev mmc 2, hwpart 0, sector 0x0, count 0xe90000
A charger is plugged into the OTG
/A charger is plugged into the OTG
\A charger is plugged into the OTG
|A charger is plugged into the OTG
-A charger is plugged into the OTG
....
===========================

Remove the message for the gadget cable detection call, and just return
the status of the VBUS detection, as this is what the callers are after.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-08 23:07:15 +00:00
Andre Przywara
e32dad292a sunxi: dts: Fix typoed eMMC check
Commit 03510bf621 ("sunxi: only include alias for eMMC when mmc2
used") protected the eMMC alias in U-Boot's DT stub the with the
associated Kconfig symbol, but was actually using the wrong name.

Fix the name of the symbol to match what's defined in Kconfig and what
the defconfig files actually use.

Fixes: 03510bf621 ("sunxi: only include alias for eMMC when mmc2 used")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: 5kft@5kft.org
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-08 23:06:56 +00:00
Tom Rini
558002a0f2 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2021-12-03 09:02:49 -05:00
Tom Rini
5b9ee01685 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-net
- Two fixes from Marek for designware and mdio.
2021-12-02 09:58:20 -05:00
Thomas Skibo
c0ffc12a70 riscv: Enable SPI flash env for SiFive Unmatched.
Enable saving environment to SPI flash memory on SiFive
Unmatched.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Thomas Skibo
6a863894ad riscv: Support booting SiFive Unmatched from SPI.
Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:56 +08:00
Padmarao Begari
ffb78a7c71 doc: board: Update Microchip MPFS Icicle Kit doc
UART1 use for U-Boot and Linux console instead of UART0 and
UART0 is reserved for Hart Software Services(HSS).

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-12-02 16:43:52 +08:00
Padmarao Begari
5c007d24b9 riscv: Update Microchip MPFS Icicle Kit support
This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:52 +08:00
Padmarao Begari
06142d6874 riscv: dts: Split Microchip device tree
The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Padmarao Begari
0dc0d1e094 i2c: Add Microchip PolarFire SoC I2C driver
Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Padmarao Begari
0d914ad10d net: macb: Remove Microchip compatible string
Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-12-02 16:43:51 +08:00
Leo Yu-Chi Liang
666da85dc9 board: ae350: Support autoboot from RAM
Add boot command "bootcmd_ram" to support autoboot from RAM.

This feature could be useful at the very initial state of chip design
when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc)

The kernel image is default to be loaded at 0x2000000 via debug port,
and the following script serves as an example:

spl()
{
	cmd="riscv64-linux-gdb -q \
	-ex \"target remote $host:$port\" \
	-ex \"load\" \
	-ex \"thread apply all set \\\$pc=&_start\" \
	-ex \"thread apply all set \\\$a0=\\\$mhartid\" \
	-ex \"thread apply all set \\\$a1=<dtb address>\" \
	-ex \"restore u-boot.itb binary 0x200000\" \
	-ex \"restore Image binary 0x2000000\" \
	-ex \"c\" \
	spl/u-boot-spl
	"

	echo $cmd
	eval $cmd
}

The address where the kernel is loaded can be altered by
changing the value of KERNEL_IMAGE_ADDR.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2021-12-02 16:43:45 +08:00
Marek Vasut
3fbd17aadf net: dwc_eth_qos: Enable clock in probe
Enable DWC IP clock in driver probe, so the MII access is possible even
outside of active network transfers. This is particularly useful when
using 'mii' or 'mdio' commands to explore PHY state, neither of which
works with DWMAC currently due to the disabled clock.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:44 +02:00
Marek Vasut
8777033722 net: eth-phy: Handle gpio_request_by_name() return value
The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.

This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.

Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-12-02 08:35:37 +02:00
Michal Simek
b3425a3f4e mtd: spi: Remove SF_DUAL_FLASH symbol from Kconfig
This symbol is not used anywhere in the code. Just enable in couple of
defconfigs but it does nothing that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-12-02 11:33:01 +05:30
Marek Vasut
846d1d9c11 mtd: cqspi: Wait for transfer completion
Wait for the read/write transfer finish bit get actually cleared,
this does not happen immediately on at least SoCFPGA Gen5.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
2021-12-02 11:10:40 +05:30
Mike Karels
874e544e89 Fix MMC numbering issue for Raspberry Pi 3
Using mmc.dtbo from rpi-firmware to switch the controller for the SD
card slot from sdhci to sdhost causes the numbering to change; the
SD card is then not recognized at boot.  Add to the range checked.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:07:40 +01:00
Peter Robinson
5e7e6619c8 rpi: Add identifier for the new RPi Zero 2 W
The Raspberry Pi Foundation released the new Zero 2 W which we
want to detect, so we can detect the correct device tree file name.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-11-30 16:01:23 +01:00