Commit graph

61685 commits

Author SHA1 Message Date
Simon Glass
f083583786 common: Move bootcount functions to their header file
These don't need to be in common.h so move them out.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
c660444159 spl: bootcount: Move code out of header file
It is not good practice to write code in a header file. If it is included
multiple times then the code can cause duplicate functions.

Move the bootcount_store() and bootcount_load() functions into SPL.

Note: bootcount is a bit strange in that it uses driver model but does not
define proper drivers. This should be fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
b2ea91ba57 crc: Fix code style with crc functions
Some of these have a space before the bracket. Drop it to fix the style.
Add some missing function comments while here.

Note that u32 and u8 cannot be used here since crc.h is included on the
host side.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:07 -05:00
Simon Glass
c3a4d1c3ee common: Drop linux/crc8.h
We have an existing U-Boot header for the one function that this defines.
Use that instead of the linux/ one. Move over the nice comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:07 -05:00
Simon Glass
840ef4d43b common: Move random-number functions into their own header
Create a new rand.h header file and move functions into it, to reduce
the size of common.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:07 -05:00
Simon Glass
c076e5c9b3 status_led: Tidy up the code style
There are a few whitespace problems with this code. Tidy them up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Simon Glass
c3e4430ef3 common: Drop global inclusion of status_led.h
This is only used by a few files so it should not be in the common header.
Move it out.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Simon Glass
9ce2aa1710 Drop CONFIG_SHOW_ACTIVITY
This feature is not enabled by any board. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-12-02 18:23:06 -05:00
Simon Glass
62f9b65447 common: Move older CPU functions to their own header
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Tom Rini
357040645f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- fsl-qoriq : Minor bug fixes and updates on lx2160a, ls1028a, ls1012a,
  ls1043aqds platforms
2019-12-02 10:53:34 -05:00
Tom Rini
1f3813c2ab Merge branch 'master' of git://git.denx.de/u-boot-mips
- MIPS: remove Micronas VCT boards
2019-12-02 10:53:07 -05:00
Daniel Schwierzeck
2a250ae9b6 MIPS: remove Micronas VCT boards
The deadline for migration to CONFIG_DM is v2020.01. The VCT
baords would need an almost complete rewrite of all drivers to
support driver model.

Unless someone has access to the hardware and volunteers to do the migration,
the board should be scheduled for removal.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
2019-11-29 16:18:35 +01:00
Alex Marginean
873d00a3fb configs: ls1028a: enable CMD_DM
Since at least some of the drivers relevant to LS1028A are now following
DM, it's useful to have dm command enabled by default.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-29 10:38:12 +05:30
Pankaj Bansal
9977ebd268 board: fsl: lx2160a: Fix the typo in board_fix_fdt
Fix a typo that caused incorrect reg-name for pcie node in lx2160a rev2.

Fixes: 5d535aa40b ("board: fsl: lx2160a: implement board_fix_fdt")

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-29 10:38:12 +05:30
Priyanka Jain
7a8d9fd73c configs/lx2160a: Add CONFIG_ENV_SECT_SIZE in defconfig
Define CONFIG_ENV_SECT_SIZE as 0x20000 in lx2160a related defconfigs:
lx2160ardb_tfa_defconfig, lx2160ardb_tfa_SECURE_BOOT_defconfig,
lx2160aqds_tfa_defconfig, lx2160aqds_tfa_SECURE_BOOT_defconfig

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-29 10:38:12 +05:30
Tom Rini
dd38416d6b Merge git://git.denx.de/u-boot-socfpga
- Assorted Gen5 fixes
2019-11-28 07:34:41 -05:00
Tom Rini
c4f697b291 Merge git://git.denx.de/u-boot-usb
- USB keyboard improvements
2019-11-28 07:34:21 -05:00
Tom Rini
089612da33 Merge tag 'mmc-11-27-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc update and some cleanup in ls1021a/mpc83xx code
- mmc tmio sdhi update for hs400
2019-11-28 07:33:45 -05:00
Tom Rini
29061447a0 - Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
 - Correct the eMMC pin configuration on stm32mp157c-ev1
 - Add DFU and SPI-NAND support for stm32mp1 board
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Merge tag 'u-boot-stm32-20191126' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
2019-11-28 07:33:16 -05:00
Tom Rini
4b39568cfd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- powerpc: Fix DM_MMC related build warnings by adding eSDHC device
  module support for T4240RDB, T2080RDB, T1042D4RDB, T1024RDB, P5040DS,
  P4080DS, P3041DS, P2041RDB, P2020RDB, P1020RDB platforms
2019-11-28 07:32:44 -05:00
Marek Vasut
56b0bb96be mmc: tmio: sdhi: Add calibration tables
Instead of using single fixed value for the calibration offset,
add tables which dynamically adjust this per calibration code
from the SCC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
1bdcb83d29 mmc: tmio: sdhi: Skip bad taps
Some of the tuning taps produce suboptimal results. Add code
which skips those "bad" taps.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
6900066cf6 mmc: tmio: sdhi: Add SCC error checking
Check SCC for errors after check command if applicable and
optionally adjust the bus skew settings accordingly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
8f39b03022 mmc: tmio: sdhi: Disable auto-retuning in HS400
Disable the auto-retuning in HS400 mode in favor of manual calibration.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
e5d3f3d9e5 mmc: tmio: sdhi: Adjust HS400 calibration offsets
Adjust the TMPPORT3 offsets according to the latest information
from the chip vendor.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
dc419fc6e1 mmc: tmio: sdhi: Adjust DT2FF settings for HS400 mode
Adjust the DT2FF offsets in HS400 according to latest information
from the chip vendor.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
810998871a mmc: tmio: sdhi: Use 4 tuning taps on M3W up to ES1.2
The M3W up to ES1.2 uses 4 tuning taps for HS400, make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
37c3990664 mmc: tmio: sdhi: Track SMPCMP valu in private data
Retain the SMPCMP value from last calibration in private data.
This will be later used for skipping bad taps.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Marek Vasut
0196a58a79 mmc: tmio: sdhi: Track current tap number in private data
Retain the tap number from last calibration in private data. This
will be later used for SCC error checking after each command.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-11-27 16:56:46 +08:00
Yangbo Lu
1eaffca076 mpc83xx: remove unused clock.h
The clock.h was to define mxc_get_clock() providing clock value
to fsl_esdhc driver. Since fsl_esdhc driver is using global data
gd->arch.sdhc_clk directly now, we can remove this file.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Yangbo Lu
d3eb317ea5 arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Yangbo Lu
d9114e2b73 arm: ls1021a: drop redundant board_mmc_init()
The board_mmc_init() defined in board files is actually
doing same thing with the cpu_mmc_init() defined in
arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Yangbo Lu
5e81cbff37 mmc: fsl_esdhc: get clock directly from global data
This patch is to get clock directly from global data.

- Remove uclass clk api method. This was what i.MX platforms were
  using, while QorIQ platforms weren't.
- Get clock only from global data, dropping mxc_get_clock().
  QorIQ eSDHC controllers on one silicon use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Baruch Siach
1b71695228 mmc: sdhci: make sdhci_get_cd static
sdhci_get_cd() is not referenced anywhere else. Limit its scope to
sdhci.c.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2019-11-27 16:55:19 +08:00
Biwen Li
a3c9805f79 include/configs: ls1012a: add pfe stop command
This adds pfe stop command before boot linux kernel
to fix a problem that ethernet won't be workable
after enter linux. Because there is a h/w limitation
in LS1012A PFE, to re-initialize PFE it has to be
safe shutdown, these steps are done through PFE stop.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 13:12:19 +05:30
Wen He
283e4ab531 armv8: ls1043aqds: modify the qspi_bootcmd definition
Fix the kernel offset of qspi_bootcmd scripts, followed
the qoriq_memory_layout definition.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 13:12:19 +05:30
Alex Marginean
201d8a5cee configs: ls1028a: enable OF_LIBFDT_OVERLAY
LS1028A QDS board supports multiple combinations of SerDes protocols and
multiple add-on cards with Ethernet PHYs.  Some of them require specific
configuration in Linux DT, and the plan is to use DT overlays for them.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 13:12:19 +05:30
Yuantian Tang
0de19abc14 armv8: ls1028a: Add environment variables to facilitate the boot
Add some environment variables to facilitate the auto boot.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 13:12:18 +05:30
Patrick Delaunay
b4fee16108 stm32mp1: add support for virtual partition read
Add read for OTP and PMIC NVM with alternates
on virtual DFU device.

Serie-cc: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26 10:14:35 +01:00
Patrick Delaunay
fd399a1839 stm32mp1: board: add spi nand support
This patch adds the support of the spi nand device in mtdparts command
and in dfu_alt_info.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:14:35 +01:00
Patrick Delaunay
0df4b94207 stm32mp1: configs: activate CONFIG_MTD_SPI_NAND
Activate the support of SPI NAND in stm32mp1 U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:14:35 +01:00
Patrick Delaunay
f6031d6d58 stm32mp1: activate SET_DFU_ALT_INFO
Generate automatically dfu_alt_info for the supported device.
The simple command "dfu 0" allows to start the dfu stack on usb 0
for the supported devices:
- dfu mtd for nand0
- dfu mtd for nor0
- dfu mmc for SDCard
- dfu mmc for eMMC
- dfu ram for images in DDR

The DUF alternate use the "part", "partubi" and "mmcpart" options
to select the correct MTD or GPT partition or the eMMC hw boot partition.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:14:34 +01:00
Patrick Delaunay
4edce505f1 stm32mp1: activate DFU support and command MTD
Add support of DFU for MMC, MTD, RAM and MTD command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:13:45 +01:00
Patrick Delaunay
4d7d0e2e78 ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"

This patch solve the eMMC detection issue for command "mmc dev 1".

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26 10:11:48 +01:00
Patrick Delaunay
62d620c243 ARM: dts: stm32: DT alignment with kernel v5.4-rc4
Device tree and binding alignment with kernel v5.4-rc4

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:11:48 +01:00
Patrick Delaunay
e07a86b5e3 ARM: dts: stm32: DT alignment with kernel v5.3
Device tree and binding alignment with kernel v5.3
and converted to SPDX.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:11:48 +01:00
Patrice Chotard
5c347f3398 configs: stih410-b2260: Enable DM_ETH flag
This patch allows to fix the following compilation warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26 10:11:18 +01:00
Tom Rini
4b19b89ca4 - add RPi4 upstream compatible to pinctrl
- fix boot banner on RPi3/4
 - add support for one binary on RPi3/4
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Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-boot

- add RPi4 upstream compatible to pinctrl
- fix boot banner on RPi3/4
- add support for one binary on RPi3/4
2019-11-25 12:56:27 -05:00
Tom Rini
e3281aec74 - fix mxsfb regression on pico-imx7d and imx7d-sabre
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Merge tag 'fixes-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- fix mxsfb regression on pico-imx7d and imx7d-sabre
2019-11-25 12:56:12 -05:00