Commit graph

5 commits

Author SHA1 Message Date
Simon Glass
f1683aa73c board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-04-13 09:40:57 -04:00
Simon Glass
088454cde2 board_f: Drop return value from initdram()
At present we cannot use this function as an init sequence call without a
wrapper, since it returns the RAM size. Adjust it to set the RAM size in
global_data instead, and return 0 on success.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:59:20 -04:00
Simon Glass
52c411805c board_f: Drop board_type parameter from initdram()
It looks like only cm5200 and tqm8xx use this feature, so we don't really
need it in generic code. Drop it and have the users access gd->board_type
directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-04-05 13:58:44 -04:00
Simon Glass
e895a4b06f fdt: Allow ft_board_setup() to report failure
This function can fail if the device tree runs out of space. Rather than
silently booting with an incomplete device tree, allow the failure to be
detected.

Unfortunately this involves changing a lot of places in the code. I have
not changed behvaiour to return an error where one is not currently
returned, to avoid unexpected breakage.

Eventually it would be nice to allow boards to register functions to be
called to update the device tree. This would avoid all the many functions
to do this. However it's not clear yet if this should be done using driver
model or with a linker list. This work is left for later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2014-11-21 04:43:15 +01:00
Heiko Schocher
eaf8c986d3 mpc83xx: add ids8313 support
add support for the ids8313 board.

CPU:   e300c3, MPC8313, Rev: 2.1 at 396 MHz, CSB: 132 MHz
I2C:   ready
SPI:   ready
DRAM:  128 MiB (DDR2, 32-bit, ECC off, 264 MHz)
Flash: 8 MiB
NAND:  128 MiB
Net:   TSEC0, TSEC1 [PRIME]

public key on NOR flash start

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2014-04-23 19:07:54 -05:00