The following warning is seen in unleashed.c in a 32-bit build:
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Cast with uintptr_t.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Commit 47d73ba4f4 ("board: sifive: overwrite board_fdt_blob_setup in u-boot proper")
added a board-specific implementation of board_fdt_blob_setup() which
takes a pointer as the return value, but it does not return anything
if CONFIG_OF_SEPARATE is not enabled. This will cause a build warning
seen when testing booting S-mode U-Boot directly from QEMU, per the
instructions in [1]:
board/sifive/unleashed/unleashed.c: In function ‘board_fdt_blob_setup’:
board/sifive/unleashed/unleashed.c:125:1: warning: control reaches end of non-void function [-Wreturn-type]
Return &_end as the default case.
[1] https://qemu.readthedocs.io/en/latest/system/riscv/sifive_u.html#running-u-boot
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Invokes the common cache_init function to initialize ccache.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Add board_fdt_blob_setup to return the device tree location which is
passed by prior stage in u-boot proper. The generic board_fdt_blob_setup
always returns _end, it mignt be ok because u-boot SPL would currently
put the dtb there, but it would be broken if we put the dtb to another
place and assigned the location into a1 register for u-boot proper. Use
the location passed by prior stage would make more sence, because we
actually pass the location to u-boot proper and want to use that one,
rather than the dtb which in _end.
We can't use CONFIG_OF_PRIOR_STAGE because it doens't distinguish the
implementation of u-boot SPL and u-boot proper, so u-boot SPL need to
reply on the prior stage to pass device tree location as well, but we
don't pass the DT from boot rom now. In addition, when
CONFIG_OF_PRIOR_STAGE is enabled, the u-boot-spl.bin and u-boot.itb won't
include the device tree.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
As (3581811dc2 "riscv: sifive/fu540: Move SPL related functions to spl.c"),
we put the SPL stuff in spl.c, we don't need to compile unleashed.c and
unmatched.c in SPL build.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
It is a pain to have to specify the value 10 in each call. Add a new
dectoul() function and update the code to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.
Add a proper comment to simple_strtoul() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Ensure USB hub, PCIe-USB bridge, and ULPI device to be reset
even if the rebooting is without power-cycling.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Create a new function spl_reset_device_by_gpio to reset the device
whose reset pin is connected to the GPIO. Then, using this function
to initialize GEMGXL.
Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
This patch reverts the following commits:
- 4b4159d0f3 ("riscv: dts: add dts for unmatched rev1")
- ffe9a394df ("board: sifive: support spl multi-dtb on unmatched board")
We won't plan to support unmatched that the revision below 3 in u-boot,
so they can be dropped because they might be useless.
Changed in v2:
- rebase codebase to the latest master branch
Signed-off-by: Zong Li <zong.li@sifive.com>
Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
We wouldn't like to allow user to change the serial number, so remove
the command for changing serial number in EEPROM.
Signed-off-by: Zong Li <zong.li@sifive.com>
Suggested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
There are different DDR parameter settings for different board
revisions. Add a new interface to get the PCB revision to determine
which DT should be selected at runtime.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add initial support for the PCB description EEPROM for SiFive HiFive
Unmatched boards.
This implementation is refactored based on Paul Walmsley's porting and
adopt the suggestions from David Abdurachmanov.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Add defconfig and board support for HiFive Unmatched.
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
