Commit graph

31 commits

Author SHA1 Message Date
Stefan Roese
6c70049bd1 ppc4xx: Consolidate pci_master_init() function
This patch removes the duplicted implementations of the pci_master_init()
function by introducing a weak default function for it. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:34 +01:00
Stefan Roese
a760b02031 ppc4xx: Consolidate pci_pre_init() function
This patch removes the duplicted implementations of the pci_pre_init()
function by introducing a weak default function for it. This weak default
has a different implementation for some PPC variants. It can be
overridden by a board specific version.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-19 11:35:30 +01:00
Stefan Roese
1095493a5d ppc4xx: Consolidate pci_target_init() function
This patch removes the duplicted implementations of the pci_target_init()
function by introducing a weak default function for it. This weak default
has a different implementation for 440EP(x)/GR(x) PPC's. It can be
overridden by a board specific version (e.g. PMC440, korat).

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-11-19 11:35:08 +01:00
Stefan Roese
9a81c61249 ppc4xx: Remove duplicated is_pci_host() functions
This patch introduces a weak default function for is_pci_host(),
returning 1. This is the default behaviour, since most boards only
implement PCI host functionality. This weak default can be overridden
by a board specific version if needed.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-11-09 11:27:08 +01:00
Stefan Roese
c85b583970 ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clock
This patch now uses the 440EP(x)/GR(x) function to check and dynamically
reconfigure the PCI sync clock.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-23 16:05:02 +02:00
Niklaus Giger
ddc922ff2c ppc_4xx: Apply new HW register names
Modify all existing *.c files to use the new register names
as seen in the AMCC manuals.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-07 09:15:20 +02:00
Stefan Roese
95b602bab5 ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case
The latest PPC4xx register cleanup patch missed some SDRAM defines.
This patch now changes lower case UIC defines to upper case. Also
some names are changed to match the naming in the IBM/AMCC users
manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28 10:45:54 +02:00
Stefan Roese
952e7760bf ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-28 10:45:42 +02:00
Stefan Roese
d1c3b27525 ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-09-11 10:35:58 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Stefan Roese
e321801bed ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
This patch removes some ft_board_setup() functions from some 4xx boards.
This can be done since we now have a default weak implementation for this
in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
implementation like canyonlands need their own version.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-07-11 13:18:13 +02:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Stefan Roese
bbeff30cbd ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.

This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:

csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG

I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-06-03 20:22:19 +02:00
Ira Snyder
4adb3023de ppc4xx: Add device tree support to AMCC Yosemite
Add support for booting with a device tree blob. This is needed to boot
ARCH=powerpc kernels. Also add support for setting the eth0 mac address
via the ethaddr variable.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Stefan Roese <sr@denx.de>
2008-05-08 07:06:05 +02:00
Stefan Roese
5a5958b7de ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.

This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-15 11:29:33 +02:00
Stefan Roese
466fff1a7b ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since
it's not needed anymore with the patch from Matthias Fuchs with
the "weak" pci_pre_init() implementation.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-25 15:57:39 +02:00
Stefan Roese
700200c67e [PATCH] Merge Yosemite & Yellowstone board ports
Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
share one config file and all board specific files. This way we
don't have to maintain two different sets of files for nearly
identical boards.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-30 17:04:19 +01:00
Stefan Roese
36adff362c [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speed
Now the board revision and the current PCI bus speed are printed after
the board message.

Also the EBC initialising is now done via defines in the board config
file.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-13 07:59:19 +01:00
Stefan Roese
f3443867e9 Add CONFIG_BOARD_RESET to configure board specific reset function
Patch by Stefan Roese, 07 Oct 2006
2006-10-07 11:30:52 +02:00
Stefan Roese
a2c95a7224 PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
2006-07-28 18:34:58 +02:00
Wolfgang Denk
b9b2480f4f Correct GPIO setup (UART1/IRQ's) on yosemite & yellowstone
Patch by Stefan Roese, 29 May 2006
2006-05-30 17:45:30 +02:00
Wolfgang Denk
d87080b721 GCC-4.x fixes: clean up global data pointer initialization for all boards. 2006-03-31 18:32:53 +02:00
Stefan Roese
81a3170b15 Changes to Yellowstone & Yosemite 440EP/GR eval boards:
- Changed GPIO setup to enable another address line in order to
  address 64M of FLASH.
- Added function sdram_tr1_set to auto calculate the tr1 value for
  the DDR.
Patch by Steven Blakeslee, 12 Dec 2005
2005-12-15 09:43:12 +01:00
Stefan Roese
1178a412d2 Minor AMCC 4xx board cleanups
Patch by Stefan Roese, 27 Nov 2005
2005-11-29 18:17:41 +01:00
Stefan Roese
3d9569b232 Changed PPC44x startup message (cpu info, speed...) to common style:
On PPC44x platforms, the startup message generated in "cpu.c" only
comprised the ppc type and revision but not additional informations
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.

Patch by Stefan Roese, 27 Nov 2005
2005-11-27 19:36:26 +01:00
Stefan Roese
f190c11b1f Adjust bd->bi_flashstart on Yellowstone & Yosemite to correct size
Patch by Stefan Roese, 05 Nov 2005
2005-11-05 15:50:16 +01:00
Stefan Roese
ef04a0aa26 Additional fix for external IRQ config on Yellowstone & Yosemite
Patch by Stefan Roese, 03 Nov 2005
2005-11-03 08:31:33 +01:00
Stefan Roese
e190290ba4 Fix external IRQ configuration on Yellowstone & Yosemite
The multiplexed signals Ext IRQ0...3 have to be configured as IRQ,
because they default to GPIOx (440EP/GR).

Patch by Stefan Roese, 28 Oct 2005
2005-10-28 12:21:06 +02:00
Stefan Roese
93b17ec382 Change board message on AMCC Yosemite & Yellowstone to common style
Patch by Stefan Roese, 3 Oct 2005
2005-10-03 15:27:50 +02:00
Stefan Roese
84286386a8 Update AMCC Yosemite to get a consistent setup for all AMCC eval
boards (baudrate, environment...). Flash driver fixed.
Patch by Stefan Roese, 11 Aug 2005
2005-08-11 18:03:14 +02:00
Stefan Roese
c157d8e219 Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
2005-08-01 16:41:48 +02:00