NAND flavors, like serial and parallel, have a lot in common and would
benefit to share code. Let's move raw (parallel) NAND specific code in a
raw/ subdirectory, to ease the addition of a core file in nand/ and the
introduction of a spi/ subdirectory specific to SPI NANDs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards
This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.
This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.
This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
FPGA subsystem requires special care that's why it should be maintained
via one tree.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for loading U-Boot on the Broadcom 7260 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Add scattered driver files around the source tree
that belongs to Snapdragon arch. Not sure why they
were not included in the first place.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Create separate html pages for linker lists, the serial subsystem,
and the EFI subsystem.
Add a table of content.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Highlights this time:
- Many small fixes to improve spec compatibility (found by SCT)
- Almost enough to run with sandbox target
- GetTime() improvements
- Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-07-25
Highlights this time:
- Many small fixes to improve spec compatibility (found by SCT)
- Almost enough to run with sandbox target
- GetTime() improvements
- Enable EFI_LOADER and HYP entry on ARMv7 with NONSEC=y
Scott is no longer maintaining the NAND subsystem, mark as orphaned for
now.
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.
Adapted from the Linux driver (4.17)
Changes from the original Linux driver:
* Removed HW spinlock mechanism, which is irrelevant
in U-boot particualar use case, which is just reading from the smem.
* Adapted from Linux driver model to U-Boot's.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The Linux kernel has binding for gpio-restart node.
This patch is adding basic support without supporting any optional
properties.
This driver was tested on Microblaze system where gpio is connected to
SoC reset logic.
Output value is handled via gpios cells values.
In gpio_reboot_request() set_value is writing 1 because
dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW.
...
if (desc->flags & GPIOD_ACTIVE_LOW)
value = !value;
...
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for loading U-Boot on the Broadcom 7445 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Add myself as the Maintainer for Actions Semi OWL family and its
relevant board, drivers.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Replace Mateusz as Maintainer for ARM Snapdragon arch.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Acked-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
With 'make htmldocs' we can generate a documentation if the function
comments follow the DocBook conventions.
This patch adjusts the comments for EFI boot services and provides the
DocBook template for the EFI subsystem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Here we do a couple of minor fixes like:
- Move .ivt section to the very beginning of the image
by default which allows us to use that image put right
at reset vector (usually 0x0)
- Improve relocation fix-up which became required once
we moved .ivt and understood a problem with existing implementation
where we relied on a particular placement of sections.
Now we don't care about placement because we just explicitly
check for .text and in case of ARCompact .ivt sections
- Re-implemnt do_reset() such that it calls reset_cpu() which
could implmented for a particular board
And hte most important part we introduce support for yet another
devboard from Synopsys - EMDK.
As of today 'board/synopsys/' folder contains only Synopsys ARC
boards supported by the same people who support 'arch/arc'.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Xilinx ZynqMP also contains dual Cortex R5 which can run U-Boot.
This patch is adding minimal support to get U-Boot boot.
U-Boot on R5 runs out of DDR with default configuration that's why
DDR needs to be partitioned if there is something else running on arm64.
Console is done via Cadence uart driver and the first Cadence Triple
Timer Counter is used for time.
This configuration with uart1 was tested on zcu100-revC.
U-Boot 2018.05-rc2-00021-gd058a08d907d (Apr 18 2018 - 14:11:27 +0200)
Model: Xilinx ZynqMP R5
DRAM: 512 MiB
WARNING: Caches not enabled
MMC:
In: serial@ff010000
Out: serial@ff010000
Err: serial@ff010000
Net: Net Initialization Skipped
No ethernet found.
ZynqMP r5>
There are two ways how to run this on ZynqMP.
1. Run from ZynqMP arm64
tftpb 20000000 u-boot-r5.elf
setenv autostart no && bootelf -p 20000000
cpu 4 disable && cpu 4 release 10000000 lockstep
or
cpu 4 disable && cpu 4 release 10000000 split
2. Load via jtag when directly to R5
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The zynqmpimage.c and the new zynqmpbif.c files are all maintained by
Xilinx for the Zynq platforms. Let's match them accordingly
in the MAINTAINERS file.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
freescale.com domain is no longer reachable, so switch the
maintainers' emails to nxp.com domain instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Replace references to non-existent file.
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Provides information about
- usage of the bootefi command
- overview of UEFI
- interaction between U-Boot and EFI drivers
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
were not covered as part of what's maintained by the architecture
maintainers. Add them here.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Fix my fragments to list all files in the repo.
Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f24036)
And cover dts files in board MAINTAINERS files.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ppc4xx support was removed some time ago. Lets remove the now unused
entry in MAINTAINERS as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
add RCC clock driver for STMP32MP157
- base on driver model = UCLASS_CLK
- support ops to enable, disable and get rate
of all SOC clock needed by U-Boot
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
