Commit graph

79953 commits

Author SHA1 Message Date
Pali Rohár
83a8e27062 tools/mrvl_uart.sh: Remove script
There are two tools for sending images over UART to Marvell SoCs: kwboot
and mrvl_uart.sh. kwboot received lot of new features and improvements in
last few months. There is no need to maintain two tools in U-Boot, so
remove old mrvl_uart.sh tool.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
2022-04-21 10:22:36 +02:00
Tom Rini
22bfaa1f67 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-20 14:48:59 -04:00
Tom Rini
e2743c2aa0 Merge branch '2022-04-20-assorted-improvements'
- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
  move TI am33xx to use that as well, fix DT relocation with multiple
  DRAM banks, and add a gpio read sub-command.
2022-04-20 14:33:53 -04:00
Diego Rondini
dd2b8c1155 cmd: gpio: Add gpio read subcommand
As explained in commit 4af2a33ee5 ("cmd: gpio: Make `gpio input`
return pin value again") the `gpio input` is used in scripts to obtain
the value of a pin, despite the fact that CMD_RET_FAILURE is
indistinguishable from a valid pin value.
To be able to detect failures and properly use the value of a GPIO in
scripts we introduce the `gpio read` command that sets the variable
`name` to the value of the pin. Return code of the `gpio read` command
can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE.
CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
2022-04-20 11:14:39 -04:00
Dave Gerlach
270f7fd25b ram: k3-ddrss: Allow use of dt provided initial frequency
Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR
frequency that is set for lpddr4 before initialization of the
controller. Make this optional and continue to use PLL bypass frequency
as is done currently if ti,ddr-freq0 is not provided.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2022-04-20 11:14:39 -04:00
Marek Vasut
a96d565725 image: fdt: Fix DT relocation handling with multiple DRAM banks with gap
The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
  env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.

Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so
for them the calculated highest DRAM address is 0xafffffff, which is
exactly in the gap and thus not usable.

Fix this by iterating over all DRAM banks and tracking the remaining
amount of the total mapping size obtained from env_get_bootm_mapsize().
Limit the maximum LMB area size to each bank, to avoid using nonexistent
DRAM.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2022-04-20 11:14:39 -04:00
Tom Rini
4448d0c702 am33xx: Update SYS_MALLOC_F_LEN to use 0x2000 as the default
A number of platforms here had already been increasing the size a bit,
so lets moving all of them up.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-20 11:14:39 -04:00
Tom Rini
e056892422 Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000
The most commonly used value today is 0x2000 and not 0x400.  Rework the
Kconfig logic to use this more frequently used value as the default.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Cc: Andes <uboot@andestech.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Bharat Gooty <bharat.gooty@broadcom.com>
Cc: David Lechner <david@lechnology.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Gerald Kerma <dreagle@doukki.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Kristian Amlie <kristian.amlie@northern.tech>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Bosch <stefan_b@posteo.net>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tony Dinh <mibodhi@gmail.com>
Cc: Trevor Woerner <twoerner@gmail.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: liuhao <liuhao@phytium.com.cn>
Cc: lixinde <lixinde@phytium.com.cn>
Cc: shuyiqi <shuyiqi@phytium.com.cn>
Cc: weichangzheng <weichangzheng@phytium.com.cn>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2022-04-20 11:14:39 -04:00
Dominic Rath
b4c80f245b ram: k3-ddrss: Fix register name and explain its usage
The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).

The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
2022-04-20 11:14:39 -04:00
Tom Rini
246e03476b Merge branch '2022-04-19-assorted-updates'
- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
  https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
  change
2022-04-19 17:06:01 -04:00
Pali Rohár
b8a7916467 fs: Allow to compile FS_BTRFS when SPL is enabled
Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.

Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-19 14:54:15 -04:00
Pali Rohár
c4bbbed371 btrfs: Fix compilation on big endian systems
Fix following two compile errors on big endian systems:

  CC      fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
                 from ./arch/powerpc/include/asm/byteorder.h:82,
                 from ./arch/powerpc/include/asm/bitops.h:8,
                 from include/linux/bitops.h:152,
                 from include/uuid.h:9,
                 from fs/btrfs/btrfs.c:10:
fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’:
include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’?
 #define cpu_to_le16 __cpu_to_le16
                     ^~~~~~~~~~~~~
fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’
   __u16: cpu_to_le16,     \
          ^~~~~~~~~~~

  CC      fs/btrfs/compression.o
In file included from ./arch/powerpc/include/asm/unaligned.h:9,
                 from fs/btrfs/compression.c:16:
include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~
In file included from fs/btrfs/ctree.h:16,
                 from fs/btrfs/btrfs.h:12,
                 from fs/btrfs/compression.c:8:
include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~

Include file asm/unaligned.h contains arch specific macros and functions
for unaligned access as opposite to linux/unaligned le_byteshift.h which
contains macros and functions specific to little endian systems only.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2022-04-19 14:52:34 -04:00
Sean Anderson
9dc775aabb IOMUX: Fix access past end of console_devices
We should only access console_devices[file][i] once we have checked that i
< cd_count[file]. Otherwise, we will access uninitialized memory at the end
of the loop. console_devices[file][i] should not be NULL, but putting the
assignment in the loop condition allows us to ensure that i is checked
beforehand. This isn't a bug, but it does make valgrind stop complaining.

Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Andrew Scull <ascull@google.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2022-04-19 14:52:34 -04:00
Tom Rini
24c904f309 Convert CONFIG_SYS_MEM_TOP_HIDE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_MEM_TOP_HIDE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-04-19 14:52:34 -04:00
Du Huanpeng
bdf9831226 tools: add boot/ to .gitignore
/tools/boot/ is a build product. Add it to .gitignore

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2022-04-19 14:51:11 -04:00
Heinrich Schuchardt
9bd89bbd71 fs/squashfs: simplify sqfs_read()
* Don't check argument of free(). Free does this itself.
* Reduce scope of data_buffer. Remove duplicate free().
* Avoid superfluous NULL assignment.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-04-19 14:51:11 -04:00
Heinrich Schuchardt
7ffc66e7db image-fit: don't check free() argument
* free() checks if its argument is NULL. Remove duplicate checks.
* Remove duplicate free(ovcopy).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-04-19 14:51:11 -04:00
Billy Tsai
fe2f284270 gpio: aspeed: Fix incorrect offset of read back register.
The offset of the current read back register is the value of the gpio pin,
not the value written for the gpio output.
This patch fix it to avoid the other gpio output value controlled by the
same register being set incorrectly.

Fixes: 7ad889b0f3 ("gpio: Add Aspeed GPIO driver")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2022-04-19 14:51:11 -04:00
Ilias Apalodimas
0b93b7fed6 configs: Enable EXT4 and ISO partitions for the DeveloperBox
Since this box is SystemReady compliant enable ISO_PARTITION which is
needed to start some installers (e.g Fedora).  While at it enable EXT4
as well which is a common filesystem for targets

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2022-04-19 14:51:11 -04:00
Michal Simek
fcbdd7a070 .mailmap: Start to use new amd.com email address
Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb994 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-04-19 14:51:11 -04:00
Daniel Golle
5f2d5915f8 image-fdt: save name of FIT configuration in '/chosen' node
It can be useful for the OS (Linux) to know which configuration has
been chosen by U-Boot when launching a FIT image.
Store the name of the FIT configuration node used in a new string
property called 'u-boot,bootconf' in the '/chosen' node in device tree.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-04-19 14:51:11 -04:00
Tom Rini
9acf3726b6 Merge tag 'u-boot-rockchip-20220418' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add rk3066 SoC support;
- Add rk3066 MK808 board support;
- dts sync from kernel for rk322x, rk3288;
- some other board level config update;
2022-04-19 08:50:40 -04:00
Tom Rini
aec75a3d1d Merge branch '2022-04-18-dm-reducing-spl-memory-usage'
- Assorted DM cleanups from Simon.  This results in some noticeable
  binary size savings in SPL.
2022-04-19 08:14:15 -04:00
Simon Glass
cdd73e7215 dm: core: Deal with a wrinkle with linker lists
When every member of a linker list is aligned by the compiler, we can no
longer rely on the sizeof of the struct to determine the number of
entries.

For example, if the struct size is 0x90 but every entry is aligned to 0xa0
by the compiler, the linker list entries takes more space in memory and
the calculation of the number of entries is incorrect. For example, we may
see 0x12 entries when there are only 0x11.

This is a real problem. There may be a general solution, although I cannot
currently think of one. So far it only bites with OF_PLATDATA_RT which
creates a pointer to each entry of the 'struct udevice' linker_list. This
does not happen without that option, so it only affects SPL.

Work around it by manually calculating the aligned size of struct udevice,
then using that for the n_ent calculation.

Note: the alignment fix to linker list was here:

   0b2fa98aa5 linker_lists: Fix alignment issue

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
092d5c2a83 dm: core: Allow devres to be disabled in SPL
At present if devres is enabled in U-Boot proper it is enabled in SPL.
We don't normally want it there, so disable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Angus Ainslie <angus@akkea.ca>
2022-04-18 17:53:56 -04:00
Simon Glass
0c6be933ff sandbox: Align linker lists to a 32-byte boundary
Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
1b34719b61 sandbox: Allow link flags to be given
At present the link flags are not used for sandbox. Update the command
line to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
1ddda37bbe Makefile: Avoid resetting link flags in config.mk
This makes it impossible to change them elsewhere. The default value is
'empty' anyway, so just drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
55cbf5ad50 Makefile: Drop a stale comment about linking
The bug mentioned here is fixed, so drop the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Simon Glass
830d73b4de sandbox: Correct loss of early output in SPL
At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.

This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-04-18 17:53:56 -04:00
Johan Jonker
dcaaefdc0a rockchip: video: mipi: add more compatible strings for rk3288/rk3399
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0944e77fde rockchip: video: rk_edp: add more rk3288 edp node options
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
8f47414466 board: rk3288: add more DT files to MAINTAINERS
A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
8042717afa board: google: veyron: add more DT files to MAINTAINERS
The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
5859bb2863 rockchip: fix boot_devices constants
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
52a0c68994 arm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
334d519a13 rockchip: rk3288-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
444311196e rockchip: rk3288-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
d3cb7565de arm: dts: rockchip: sync rk3229-evb.dts from Linux
Sync rk3229-evb.dts from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6980e83c41 arm: dts: rockchip: sync rk322x.dtsi from Linux
Sync rk322x.dtsi from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
d886532a7c arm: dts: rockchip: move all rk322x u-boot specific properties in separate dtsi files
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
6914ef8e67 rockchip: rk3228-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
3c48a62460 rockchip: rk3228-power: sync power domain dt-binding header from Linux
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
c57677b06f doc: rockchip: add rk3066 Rikomagic MK808
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0c99c6e63e doc: rockchip: add px30/rk3326 boards and examples
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
ed33f8c4e3 doc: rockchip: restyle rockchip.rst
With more text coming to the rockchip.rst document,
give it a restyle first.

Changed:
  sort build examples alphabetically
  add git clone example
  fix bash examples
  fix phrases (grammer)
  fix typos

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
ccd8ab374e rockchip: rk3066: add mk808_defconfig
This commit adds the default configuration file and
relevant description for a MK808 board.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
62fcd72ef2 rockchip: rk3066: add Rikomagic MK808 board
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
33f4750783 rockchip: rk3066: add core support
Add the core architecture code for the rk3066.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00
Johan Jonker
0034f1da5a rockchip: tools: add rk3066 support to rkcommon.c
Add rk3066 support to rkcommon.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-04-18 11:25:13 +08:00