Commit graph

3 commits

Author SHA1 Message Date
Guillaume La Roque
2c4e3cf212 pinctrl: meson: axg: Fix PIN and BANK offsets
Periphs bank offset must be applied on all pins and
PMX bank to prevent issue in meson_pinconf_set call.
Without offset on pins when a call to pinconf is done
meson_gpio_calc_reg_and_bit return wrong offset.
To avoid breaking pmx function offset is needed in pmx bank structure too.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-10 16:54:59 +02:00
Carlo Caione
139ebe9eb9 pinctrl: meson: axg: Fix GPIO pin offsets
The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-12-07 11:01:09 +01:00
Jerome Brunet
8587839f19 pinctrl: meson: add axg support
This adds support for the Amlogic AXG SoC pinctrl and GPIO controller
using a specific set of pinctrl functions which differs from the GX SoCs.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00