Jens Scharsig
7cedb29872
updates the at91 main_clock calculation
...
* updates the conditional main_clock calculation (if AT91_MAIN_CLOCK defined) to c structure SoC access
* add need register flags
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-03-07 12:36:36 -06:00
Jens Scharsig
5d8e359c38
add c structures for SoC access
...
* add's c structures for SoC access to pheriperials head files
Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-02-12 12:31:54 -06:00
Sedji Gaouaou
22ee647380
at91: Introduction of at91sam9g45 SOC.
...
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.
The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.
Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:43:34 +02:00
Jean-Christophe PLAGNIOL-VILLARD
01550a2b65
pm9263: use macro instead of hardcode value for the lowlevel_init
...
optimize a few the RAM init
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:11 +02:00
Jean-Christophe PLAGNIOL-VILLARD
dc39ae9513
at91sam9/at91cap: improve clock framework
...
calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-04-16 21:30:44 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8ed2f5f950
at91: move arch-at91sam9 to arch-at91
...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-12 18:41:42 +02:00