Commit graph

322 commits

Author SHA1 Message Date
Andy Yan
619f002db8 rockchip: make_fit_atf.py: fix loadables property set error
Commit b238e4b00c ("rockchip: Cleanup of make_fit_atf.py.") set
firmware = "atf_1";
loadables = "uboot","atf_1","atf_2";

Actually it should be:
firmware = "atf_1";
loadables = "uboot","atf_2","atf_3";

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-05 15:57:52 +08:00
Kever Yang
665ebcadd6 rockchip: rk3288: enable TPL for tinker-board
All the config for TPL has been update, we can enable the TPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-02 11:49:49 +08:00
Kever Yang
45290847df rockchip: rk3288: add separate TPL STACK address
TPL is at SRAM while other stage is at SDRAM, so it needs
separate STACK.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-02 11:49:49 +08:00
Kever Yang
d18ca747b6 rockchip: rk3288: enable TPL configs to chip level
More boards other than vyasa needs TPL, so enable the TPL configs
at chip level instead of board level.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-07-02 11:49:49 +08:00
Jagan Teki
4977cf67de rockchip: rk3399: Enable TPL_BOARD_INIT
Enable TPL_BOARD_INIT, this would help us to show
TPL boot prints.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:29 +08:00
Jagan Teki
97d98e6bbf rockchip: rk3399: tpl: Mark printascii into debug
Now, we have spl_board_init which has TPL banner prints.

So mark the 'U-Boot TPL board init' print into debug.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:29 +08:00
Jagan Teki
c997c0fc28 rockchip: rk3399: tpl: Add spl_board_init
Add spl_board_init for TPL, that have TPL banner will help
to print tpl boot prints.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:28 +08:00
Jagan Teki
adde32d033 rockchip: rk3399: Enable SPL_BOARD_INIT
Enable SPL_BOARD_INIT globally to rk3399, this would
help to print the SPL banner during bootup.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:28 +08:00
Jagan Teki
5e7216462b rockchip: rk3399: spl: Mark printascii into debug
Now, we have spl_board_init with preloader_console_init that
indeed show SPL banner.

So mark the 'U-Boot SPL board init' print into debug.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:28 +08:00
Jagan Teki
07586ee432 rockchip: rk3399: Support common spl_board_init
Support common spl_board_init by moving code from puma
board file into, common rk3399-board-spl.c.

Part of the code has sysreset-gpio, regulators_enable_boot_on
but right now only puma board is using this with relevant
config options rest remains common for all targets.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:28 +08:00
Jagan Teki
96070460c3 rockchip: rk3399: Get bl31.elf via BL31
Right now rockchip platform need to copy bl31.elf into u-boot
source directory to make use of building u-boot.itb.

So, add environment variable BL31 like Allwinner SoC so-that the
bl31.elf would available via BL31.

If the builds are not exporting BL31 env, the make_fit_atf.py
explicitly create dummy bl31.elf in u-boot root directory to
satisfy travis builds and it will show the warning on console as

 WARNING: BL31 file bl31.elf NOT found, resulting binary is non-functional
 WARNING: Please read Building section in doc/README.rockchip

Note, that the dummy bl31 files were created during not exporting
BL31 case would be removed via clean target in Makefile.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-06-26 21:11:27 +08:00
Kever Yang
c009aeb8ca rockchip: Kconfig: enable SPL support for rk3328
Enable SPL support and some related option in Kconfig.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[cherry picked from 430b01462b with minor modifications]
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
2019-06-26 21:11:26 +08:00
Kever Yang
661519e5c5 rockchip: rk3328: add SPL board file support
rk3328 SPL is locate at dram, so do not have strict size limit,
suppose to enable storage media controller driver, load ATF and
U-Boot, then boot into ATF.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[cherry picked from 4ebe3968b6 with minor modifications]
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-06-26 21:11:26 +08:00
Heinrich Schuchardt
6a853dbcc0 lib: time: export usec_to_tick()
In the UEFI Stall() boottime service we need access to usec_to_tick().

Export the function.

Remove redundant implementation in arch/arm/mach-rockchip/rk_timer.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-06-04 22:09:26 +02:00
Christoph Muellner
b238e4b00c rockchip: Cleanup of make_fit_atf.py.
This patch cleans up make_fit_atf.py in the following way:

* Fix all issues reported by pylint
* Move copyright notice from file-to-generate to script
* Fix of-by-one bugs in loadables property
* Remove commented-out (dead) code.

Besides the bugfix no intended changes.

Tested on RK3399-Q7 with TF-A v2.1 as BL31.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-30 18:22:35 +08:00
Christoph Muellner
78a1ac33cb rockchip: rk3399: Add option to print on UART3.
The RK3399 SPL does not use a pinctrl driver to setup the UART pins.
Instead it works based on config macros, which set the base address
of the actual UART block.

Currently the RK3399 SPL support UART0 and UART2.
This patch adds UART3 in the same way as UART0.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-30 18:22:35 +08:00
Trevor Woerner
1001502545 CONFIG_SPL_SYS_[DI]CACHE_OFF: add
While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-05-18 08:15:35 -04:00
Jagan Teki
2666bd42c6 arm: rockchip: rk3399: Move common configs in Kconfig
Few SPL and U-Boot proper configs are common to all rk3399 target
defconfigs, move them and select it from platform kconfig.

Moved configs:
-  SPL_ATF
-  SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
-  SPL_LOAD_FIT
-  SPL_CLK if SPL
-  SPL_PINCTRL if SPL
-  SPL_RAM if SPL
-  SPL_REGMAP if SPL
-  SPL_SYSCON if SPL
-  CLK
-  FIT
-  PINCTRL
-  RAM
-  REGMAP
-  SYSCON
-  DM_PMIC
-  DM_REGULATOR_FIXED

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:13 +08:00
Kever Yang
6bbf5e1a94 rockchip: rk3399: add tpl support
Rockchip platform suppose to use TPL(run in SRAM) as dram init and
SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
limited by SRAM size.
This patch add rk3399-board-tpl.c and its common configs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
3cbec0ad09 rockchip: add u-boot-tpl-v8.lds
We don't have both sram and sdram in TPL, so update from:
arch/arm/cpu/armv8/u-boot-spl.lds

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-05-08 17:34:12 +08:00
Kever Yang
6459e7f588 rockchip: rk3368: remove uart iomux init in SPL
The iomux should have been set in board_debug_uart_init(),
do not set in board_init_f(), remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
579a168466 rockchip: rk3368: support UART2/4 in board_debug_uart_init()
evb-rk3368 is using UART2 and PX5 evb is using UART4

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
2019-05-08 17:34:12 +08:00
Kever Yang
c34643e0db rockchip: rk322x: add tpl support
Move original spl to tpl, and add spl to load next stage firmware,
adapt all the address and option for them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-05-08 17:34:12 +08:00
Philipp Tomsich
dd320e122f rockchip: rk3288: include header for back_to_bootrom
To avoid a warning, we need to include the header defining
back_to_bootrom for us.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:59 +02:00
Philipp Tomsich
8c5805a210 rockchip: rk3399: include gpio.h
After applying the series for debug_uart_init(), Travis-CI reports:

arch/arm/mach-rockchip/rk3399/rk3399.c:90:2: error: implicit declaration of function 'spl_gpio_set_pull' [-Werror=implicit-function-declaration]
  spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_B, 2), GPIO_PULL_NORMAL);
  ^~~~~~~~~~~~~~~~~

This is caused by a missing header-file include.  Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:59 +02:00
Kever Yang
c79bce16e5 rockchip: rk3399: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:59 +02:00
Kever Yang
f9e8145614 rockchip: rk3399: use grf structure to access reg
Prefer to use structure to access register if we could.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
6a03335714 rockchip: rk3368: move board_debug_uart_init() to rk3368.c
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
e83e885e53 rockchip: rk3288: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file for all rockchip SoCs later.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
070e48b30e rockchip: rk3288: use grf structure to access soc_con2
Prefer to use structure to access register if we can.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
28fe4d5b30 rockchip: rk322x: move board_debug_uart_init() to rk322x.c
Move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file later for all rockchip SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed up header-list to not break FASTBOOT:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
86d0eca451 rockchip: rk3188: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
7f3eec03d5 rockchip: rk3036: add board_debug_uart_init()
Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed whitespace error:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 09:40:58 +02:00
Kever Yang
b0a569da08 rockchip: enable DEBUG_UART_BOARD_INIT by default
All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
UART IOMUX, enable it by default.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:06 +02:00
Kever Yang
b1b449bf1f rockchip: correct ARCH_SOC name
The ARCH_SOC name default as 'rockchip' and we put all the
header file in 'arch/arm/include/asm/arch-rockchip/', but
the 'rockchip' is not the SOC name, let's correct it after
we update all the source file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsiich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Kever Yang
15f09a1a83 rockchip: use 'arch-rockchip' as header file path
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Urja Rannikko
59ef021b99 rk3288-board: remove pinctrl call for debug uart
This failed and caused a boot failure on c201, and afaik
the pins should be setup by the new pinctrl driver.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-05-01 00:00:05 +02:00
Philipp Tomsich
a2893baa47 Revert "rockchip: Drop call to rockchip_dnl_mode_check() for now"
Due to a final resolution not coming up in time for 2019.04 and
following the consensus on the discussion, we'll keep this around
for 2019.04 after all.

This reverts commit 0d968ceb1f.
2019-03-29 09:21:13 +01:00
Philipp Tomsich
73ced87e9a rockchip: rk3399: spl: ensure that debug_uart_init is called
With the latest changes to add support for the Chromebook Bob,
initialisation through debug_uart_init() did no longer get called for
other targets.

Fix this, by moving debug_uart_init() out of the Bob-specific

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:14 +01:00
Simon Glass
9e92116bc8 rockchip: Add support for chromebook_bob
Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.

Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)

Not included:
- Keyboard
- Display
- Sound
- USB
- TPM

Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
c35f8e5017 rockchip: Tidy up board include-file ordering
These board files have inconsistent #include ordering. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
Simon Glass
3523c07867 rockchip: Allow booting from SPI
The u-boot,spl-boot-device property only allows MMC at present. Add SPI as
well for boards that boot from SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:13 +01:00
David Wu
08c817c399 ARM: rockchip: Remove the pinctrl request at rk3288-board-spl
If we use the new pinctrl driver, the pinctrl setup will be done
by device probe. Remove the pinctrl setup at rk3288-board-spl.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
bfb11abef2 ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188
It seems that pinctrl is not requested for rk3188 SPL, remove it so
that can save more space for SPL image size.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
David Wu
c0b163e908 ARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPL
When the boot ROM sets up MMC we don't need to do it again. Remove the
MMC setup code entirely, but we also need to enable uart for debug message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:11 +01:00
Marty E. Plummer
8e2e601c5f rockchip: add support for veyron-speedy (ASUS Chromebook C201)
This adds support for the ASUS C201, a RK3288-based clamshell
device. The device tree comes from linus's linux tree at
3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
are for 4GB Samsung LPDDR3, decoded from coreboot's
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc

Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Simon Glass
0d968ceb1f rockchip: Drop call to rockchip_dnl_mode_check() for now
This function causes a 5-second delay and stops the display working on
minnie. This code should be in a driver and should only be enabled by
a device-tree property, so that it does not affect devices which do not
have this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-02-01 16:59:10 +01:00
Tom Rini
2f41ade79e linker: Modify linker scripts to be more generic
Make use of "IMAGE_MAX_SIZE" and "IMAGE_TEXT_BASE" rather than
CONFIG_SPL_MAX_SIZE and CONFIG_SPL_TEXT_BASE.  This lets us re-use the
same script for both SPL and TPL.  Add logic to scripts/Makefile.spl to
pass in the right value when preprocessing the script.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850evm & omap3_logic_somlv
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-01-26 22:55:53 -05:00
Tom Rini
b32ba6f12e rockchip: Add TPL_MAX_SIZE for RK3288
Per Kever Yang, 32768 is a reasonable max size for TPL on RK3288.

Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-01-26 22:55:53 -05:00
Kever Yang
7ff025561d rockchip: rk3036: ram: update license
All the source code of sdram_rk3036.c are from Rockchip, update the
copyright to owned by Rockchip.

Because rockchip may use this copy of code both for open source
project and internal project, update the license to use both
GPL2.0+ and BSD-3 Clause.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-01-02 22:36:46 +01:00