Commit graph

31 commits

Author SHA1 Message Date
Tom Rini
cbe607b920 Xilinx changes for v2021.04-rc3
qspi:
 - Support for dual/quad mode
 - Fix speed handling
 
 clk:
 - Add clock enable function for zynq/zynqmp/versal
 
 gem:
 - Enable clock for Versal
 - Fix error path
 - Fix mdio deregistration path
 
 fpga:
 - Fix buffer alignment for ZynqMP
 
 xilinx:
 - Fix reset reason clearing in ZynqMP
 - Show silicon version in SPL for Zynq/ZynqMP
 - Fix DTB selection for ZynqMP
 - Rename zc1275 to zcu1275 to match DT name
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Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
2021-02-23 10:45:55 -05:00
Michal Simek
fc3c6fd752 xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP
Fix bug introduced by commit listed below. It is for cases where Versal or
ZynqMP don't have DDR mapped. Later SPL was also excluded by
commit a672b9871b ("xilinx: common: Do not touch
CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL").

Fixes: 506009fc10 ("xilinx: common: Change macro handling in board_fdt_blob_setup()")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-10 13:20:27 +01:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Michal Simek
a672b9871b xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL
This hook is used in full U-Boot that's why there is no reason to touch
this location from SPL. The hook was introduced for QEMU usage but none is
really running SPL on QEMU that's why it shouldn't break any usecase.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
506009fc10 xilinx: common: Change macro handling in board_fdt_blob_setup()
Remove ifdef logic which is handled by preprocessor and move it link time
optimization to get full compile code coverage.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-20 08:34:53 +01:00
Michal Simek
05af4834ad xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29 08:55:43 +01:00
Michal Simek
1230582150 microblaze: Wire generic xilinx board_late_init_xilinx()
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
T Karthik Reddy
d388cedd46 xilinx: Add DDR base address to bootscript address
Add ram base address to scriptaddr env variable to make boot
script address to be a valid address when ddr base address changes.

This works properly if the first memory region is the region where uboot
runs. Also the solution was taken in respect of a lot of jtag script
putting u-boot script to certain address. For standard cases
bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed
out of this location it does calculation.

This is not the best solution and should be done differently in future but
enough for now till we don't have full solution ready yet.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
f149b39ca3 xilinx: board: Add FRU decoder support
FMC cards are using FRU format for card identification. That's why add
support for this format.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
7c553ac0ff xilinx: common: Protect board_late_init_xilinx()
Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
a03b594738 xilinx: board: Add support for additional card detection
The most of Xilinx evaluation boards have FMC connectors which contain
small eeprom for card identification. That's why read content of eeprom and
record it.
Also generate cardX_ variables for easier script handling.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
d61728c8e8 xilinx: board: Read the whole eeprom not just offset
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
e2572b5544 xilinx: common: Do not save fdt_blob to bss section
For SPL flow without specifying address for DT loading DTB is automatically
appended behind U-Boot code. Specifically _end symbol is used. Just behind
it there is place for bss section.
It means if early code is using static variable and there is a write to
this variable DTB file is corrupted if variable is located between DTB
start and end.
In this particular case offset of this variable from bss section start is
very small (0x40) that's why DT is currupted which breaks this boot flow.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:41 +02:00
Michal Simek
2570cc6430 xilinx: common: Change bootm_size variable setting
Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).

There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
ca0f616530 xilinx: common: Check return value from variable setup
env_set..() can failed that's why check return status and report it back to
make sure that user is aware that's something went wrong.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
653809f43f xilinx: common: Get rid of initrd_high variable setup
When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:58:16 +02:00
Michal Simek
9fea3b18d6 xilinx: Change logic around zynq_board_read_rom_ethaddr()
There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
c8da6513c0 xilinx: Setup bootm variables
On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:46:55 +02:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Michal Simek
a29511eeca xilinx: Move initrd_high setup to common location
Moving to common location initrd_high is also setup for Zynq which hasn't
done in run time code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
80fdef12b2 xilinx: Introduce board_late_init_xilinx()
This function should keep common shared late configurations for Xilinx
SoCs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
453bb77d09 arm64: xilinx: Never touch DDR if system has no DDR
If DDR is not mapped do not touch it. Default
XILINX_OF_BOARD_DTB_ADDR is pointing to DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Simon Glass
14ca9f7f5a dm: core: Rename ofnode_get_chosen_prop()
This function is actually intended to read a string rather than a
property. All of its current callers use it that way. Also there is no way
to return the length of the property from this function.

Rename it to better indicate its purpose, using ofnode_read as the prefix
since this matches most other functions.

Also add some tests which are missing for these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:45 -07:00
Michal Simek
fc274a5932 arm64: zynqmp: Add support for OF_SEPARATE with board DTB
OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup().

OF_BOARD option is mostly used for picking up DTB from certain location.

OF_SEPARATE option is used when DTB is appended after u-boot binary.

This board specific function is aligned with current version in
lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
db5b253f01 arm64: zynqmp: Rename fw_dtb variable to fdt_blob
The reason for this change is just get in sync with board_fdt_blob_setup()
available at lib/fdtdec.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Ibai Erkiaga
f4e7e61193 arm64: xilinx: Enable generic of_board_dtb
Modify the configuration naming to be generic to xilinx rather than
specific to Versal. The offset value is different for Zynq and ZynqMP
to avoid overlapping with FSBL.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 13:14:54 +02:00
Ibai Erkiaga
fec657bebd arm64: versal: Move common board dtb search
Move the exisiting function of getting board dtb from versal to a common
Xilinx folder.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-08 13:14:54 +02:00
Michal Simek
027b1134b2 xilinx: common: Remove !DM_i2C code for reading mac from eeprom
All platforms are converted to DM_I2C that's why there is no reason to
keep this code here.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-02-14 14:31:10 +01:00
Michal Simek
829e8c73dd xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr()
It is much easier to point to eeprom which stores information like MAC
address directly via DT. eeprom which contains this information is
pointed by /chosen/xlnx,eeprom parameter.

For example:
        chosen {
                bootargs = "earlycon";
                stdout-path = "serial0:115200n8";
+               xlnx,eeprom = &eeprom;
        };

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:09 +01:00
Michal Simek
9755e3db8b xilinx: Move zynq_board_read_rom_ethaddr to shared location
Zynq and ZynqMP are sharing similar code and there is no reason to do
code duplication. Move zynq_board_read_rom_ethaddr() to common file for
easier conversion to DM.
Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy
which is only one Zynq board which is using this feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14 14:31:09 +01:00