Commit graph

70720 commits

Author SHA1 Message Date
Jernej Skrabec
3d594efdd0 sunxi: Add H616 FEL support
H616 uses different address for reset. Add it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
8ec293e063 sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Andre Przywara
0237b3047e mmc: sunxi: Refactor mod clock register offset
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.

To avoid becoming trapped with some compatible fallback strings, let's
remove the whole struct sunxi_mmc_variant, and replace this with a SoC
based choice, which we can derive from the CONFIG_MACH_SUNx_y symbols.

This will later simplify H616 support.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
f4317dbd06 sunxi: Add H616 DRAM support
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.

Controller and MBUS are very similar to H6 but PHY is completely
unknown.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
d0b07c15c2 sunxi: add support for R_I2C on H616
This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
c13d98b77e sunxi: add support for H616 uart0
This port is used for debug terminal on all known H616 boards.

Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Jernej Skrabec
b18bd53d6c sunxi: introduce support for H616 clocks
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
c0b417b2f1 sunxi: support loading with SPL > 32KB
H616 supports and needs bigger SPL than 32 KiB, mostly due to big DRAM
driver and need for PMIC configuration, which pulls several drivers which
are not needed otherwise.

spl_mmc_get_uboot_raw_sector() will now compare pre-configured size with
that, reported in SPL header. If size in header is bigger, it will use
that value instead.

In the process of function rework, also add missing function argument.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
57e7623776 sunxi: Add support for I2C on H6 like SoCs
I2C support, especially R_I2C port, will be needed in future. Upcoming
support for H616 will need R_I2C to adjust DRAM voltage.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
807d94258c sunxi: prcm: Add memory map for H6 like SoCs
There was no need to have prcm definitions for H6 and similar SoCs till
now. However, support R_I2C will be needed soon in SPL.

Move old definitions to prcm_sun6i.h and add new ones in prcm_sun50i.h.
One of those files will be selected in common prcm.h based on defined
macros.

This commit doesn't do any functional change.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
b296800203 i2c: mvtwsi: sunxi: update macro
While currently none of the newer Allwinner SoCs currently has I2C
support implemented in U-Boot, this will change soon. mvtwsi driver is
good as it is for them except one macro. Update it to be ready once I2C
support lands for those SoCs.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
aaebb900c6 mmc: sunxi: Replace H6 ifdefs with H6 gen macro
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
44726096cf sunxi: Introduce common symbol for H6 like SoCs
It turns out that there are at least 2 other SoCs which have basically
the same memory map, similar clocks and other features as H6. It's very
likely that we'll see more such SoCs in the future. In order to ease
porting to new SoCs and lower ifdef clutter, introduce common symbol for
them.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
fbd37d8d28 sunxi: Add support for AXP305 PMIC
This PMIC can be found on H616 boards and it's very similar to AXP805
and AXP806.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
e9ad1b8dc5 sunxi: Properly check for SATAPWR and MACPWR
The #ifdef CONFIG_xxxPWR conditionals were not working as expected, as
string Kconfig symbols are always "defined" from the preprocessor's
perspective. This lead to unnecessary calls to the GPIO routines, but
also always added a half a second delay to wait for a SATA disk to power
up. Many thanks to Peter for pointing this out!

Fix this by properly comparing the Kconfig symbols against the empty
string. strcmp() would be nicer for this, but GCC does not optimise this
away, probably due to our standalone compiler switches.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi WinPlus
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-25 21:52:00 +00:00
Andre Heider
c81877a919 sunxi: Add support for Orange Pi 3
dts file is taken from Linux 5.11-rc1 tag.

The Bluetooth controller of this device ships with a default address,
use the new CONFIG_FIXUP_BDADDR option to fix it up.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
[Updated OrangePi 3 DT, rebase and config update]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
a54b2925a6 sunxi: Add support for Tanix TX6
This commit adds support for Tanix TX6 TV box, based on H6. It's low end
H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
peripherals.

DT file is taken from Linux 5.11-rc1 release.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Jernej Skrabec
750cabc87b ARM: dts: sunxi: h6: Update DT files
Updated H6 DT files are based on Linux 5.11-rc1 release.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:00 +00:00
Andre Przywara
219a5d5a97 net: sun8i-emac: Allow all RGMII PHY modes
So far all GBit users of the sun8i-emac driver were using the "rgmii"
PHY mode, even though this turns out to be wrong. It just worked because
the PHY driver doesn't do the proper setup (yet).
In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the
correct ones.

To allow the DTs to describe the phy-mode correctly, and to stay
compatible with Linux, at least allow those other RGMII modes in the
driver.

This avoids breakage if mainline DTs will be synced with U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 21:52:00 +00:00
Tom Rini
c99be953e7 - MIPS: add support for Mediatek MT7620 SoCs
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Merge tag 'mips-pull-2021-01-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips

- MIPS: add support for Mediatek MT7620 SoCs
2021-01-25 14:38:40 -05:00
Tom Rini
4057b98ff2 Changes for 2020.04
-------------------
 
 - new board:
 	Phytec phyCORE-i.MX8MP
 	i.MX8MN Beacon EmbeddedWorks devkit
 
 - Fixes:
 	several nanbcb fixes
 	fix for imx8mm_beacon
 - further switch to distro boot commands
 - DM:
 	DM Ether for MX6UL
 
 CI:
 
 https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
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Merge tag 'u-boot-imx-20210125' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Changes for 2020.04
-------------------

- new board:
	Phytec phyCORE-i.MX8MP
	i.MX8MN Beacon EmbeddedWorks devkit

- Fixes:
	several nanbcb fixes
	fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
	DM Ether for MX6UL

CI:

https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
2021-01-25 09:02:35 -05:00
Tom Rini
7f10b8eed4 Pull request for documentation tag doc-2021-04-rc1 (2)
* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
 * Adjust suppression of newline in echo command.
 * Provide unit test for echo command.
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Merge tag 'doc-2021-04-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for documentation tag doc-2021-04-rc1 (2)

* Man-pages for sbi, exit, for, echo, loady, true, false, conitrace
* Adjust suppression of newline in echo command.
* Provide unit test for echo command.
2021-01-25 09:02:06 -05:00
Tom Rini
aee5bcce35 Second set of u-boot-atmel features for 2021.04 cycle
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Merge tag 'u-boot-atmel-2021.04-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel features for 2021.04 cycle

This feature set includes macb updates for all interfaces and new
sama7g5 variant support; micrel ksz9031 DLL support; a new board from
Giant based on Adafruit feather form factor which contains a SAMA5D27
SoC; several fixes regarding the NAND flash PMECC block; and pincontrol
drive strength support for pio4 controller.
2021-01-25 09:01:28 -05:00
Heinrich Schuchardt
5b6dac01e6 doc: describe command conitrace
Provide a man-page for the conitrace command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
bce86e075f doc: describe the false command
Provide a man-page for the false command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
a03185a3ec dm: core: describe uclass_root_s
'make htmldocs' creates a warning:

./include/asm-generic/global_data.h:443:
warning: Function parameter or member 'uclass_root_s'
not described in 'global_data'

Correct the member descriptions.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
9d4445bc6d doc: document true command
Create a man-page for the true command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
a3ad3079c0 doc: describe loady command
Create a man-page for the loady command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:34 +01:00
Heinrich Schuchardt
b911208f41 cmd: correct long text loadb, loadx, loady
The first argument is the load address and not an offset.

The second argument cannot be entered without the first one.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
750ff62da7 doc: document echo command
Provide a man-page for the echo command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
c0445c18d3 test: unit test for echo command
Provide a unit test for the unit command

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
d018734c0c cmd: change suppress newline in echo command
By default the echo command emits its arguments followed by a line feed.

If any of the arguments contains the sub-string "\c", the line feed is
suppressed.

This does not match shells used in Linux and BSD where the first argument
has to be -n to suppress the line feed.

The hush shell interferes with the parsing of backslashes. E.g. in the
following command line quadruple backslashes are required for suppressing
the line feed:

for i in 1 2 3; do for j in 4 5; do echo \\\\c ${i}${j}; done; echo; done;

To avoid unexpected behavior the patch changes echo to use -n as first
argument to suppress the line feed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
de702493c4 doc: document for statement
Create a man-page for the for statement.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
627b57bde0 doc: describe exit command
Man-page for exit shell command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Heinrich Schuchardt
9c6d050966 doc: document sbi command
Add a man-page for the sbi command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25 01:15:33 +01:00
Weijie Gao
9f03585e8d MAINTAINERS: add maintainer for MediaTek MIPS platform
Update maintainer for MediaTek MIPS platform

Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
8d6465ba53 reset: reset-mtmips: add DM_FLAG_PRE_RELOC flag
Add DM_FLAG_PRE_RELOC flag for reset-mtmips to make sure this driver can
be probed before relocation even if u-boot,dm-pre-reloc is not present
in the dts.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
e58e68d93e mmc: mtk-sd: assign plat->cfg.f_max with a correct value
Currently this driver does not set the value of plat->cfg.f_max, which
results in that MMC framework will always run at the lowest frequency.

This patch sets plat->cfg.f_max to the maximum allowed frequency, which
equals to the source clock frequency.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
2a505cd1c7 mmc: mtk-sd: add pad control settings for MediaTek MT7620/MT76x8 SoCs
The driver is missing pad control settings (pad delay and pad conf) for
the mt7620 and mt76x8. Although mt76x8 still works well, mt7620 will
encounter CRC error on data transfers.

This patch adds default pad control settings for mt7620_compat.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
f875a12578 mmc: mtk-sd: fix sclk cycles shift value
It turns out that the sclk cycles used by mt7620/mt7628 is the same as
other chips (20 bits, 1048576), not 65536.

This patch removes sclk_cycle_shift from dev_comp, and uses a macro with
a value 20 instead.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
17ade70b6a net: add ethernet driver for MediaTek MT7620 SoC
This patch adds  ethernet driver for MediaTek MT7620 SoC.

The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in
7-port switch and two xMII interfaces (can be MII/RMII/RGMII).

The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be
configured to connect to either the intergrited FE PHY, or the xMII.
Port 5 always connects to the xMII. Port 6 is the CPU port.

This driver supports MT7530 giga switch connects to port 5.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:27 +01:00
Weijie Gao
b4f214f044 phy: add USB PHY driver for MediaTek MT7620 SoC
This patch adds USB PHY driver for MediaTek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
2db6fba051 spi: add spi controller support for MediaTek MT7620 SoC
This patch adds spi controller support for MediaTek MT7620 SoC.

The SPI controller supports two chip selects. These two chip selects are
implemented as two separate register groups, but they share the same bus
(DI/DO/CLK), only CS pins are dedicated for each register group.
Appearently these two register groups cannot operates simulataneously so
they are implemented as one controller.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
ca610ddf97 gpio: add GPIO controller driver for MediaTek MT7620 SoC
This patch adds GPIO controller driver for MediaTek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
bba4ec81fd watchdog: add watchdog driver for MediaTek MT7620 SoC
This patch adds watchdog support for the Mediatek MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
a9a3a3aafc pinctrl: mtmips: add support for MediaTek MT7620 SoC
This patch adds pinctrl support for MediaTek MT7620 SoC.
The MT7620 SoC supports only pinmux.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
4075928c36 reset: mtmips: add reset controller support for MediaTek MT7620 SoC
This patch adds reset controller bits definition header file for MediaTek
MT7620 SoC

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
d9a5da72d7 clk: add clock driver for MediaTek MT7620 SoC
This patch adds a clock driver for MediaTek MT7620 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
2161f1fcb3 serial: add uart driver for MediaTek MT7620 SoC
This patch adds uart support for MediaTek MT7620 and earlier SoCs.

The UART used by MT7620 is incompatible with the ns16550a driver.
All registers of this UART have different addresses. A special 16-bit
register for Divisor Latch is used to set the baudrate instead of the
original two 8-bit registers (DLL and DLM).

The driver supports of-platdata which is useful for tiny SPL.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00
Weijie Gao
803c8ad204 configs: mtmips: refresh for mt7628 based boards
Since mt7620 is added into Kconfig, the CONFIG_SOC_MT7628=y which is
omitted by default must be added back, otherwise make xxx_defconfig for
these boards will be configured for mt7620 platform.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-24 21:39:26 +01:00