Commit graph

54126 commits

Author SHA1 Message Date
Andy Shevchenko
f1b8641fd4 x86: acpi: Enable RTC for Intel Tangier
Intel Tangier SoC has RTC inside. So, enable it in ACPI.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-10 10:12:29 +08:00
Chris Packham
cde578ff36 ARM: mvebu: restore license information in mv_ddr_plat.{c,h}
This was unintentionally removed when syncing with upstream.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2018-12-09 17:10:13 -05:00
Tom Rini
8cb8c0c6a8 Merge git://git.denx.de/u-boot-marvell
- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya
2018-12-09 08:40:49 -05:00
Philipp Tomsich
51c2345bd2 Roll CRC16-CCITT into the hash infrastructure
The CRC16-CCITT checksum function is useful for space-constrained
applications (such as obtaining a checksum across a 2KBit or 4KBit
EEPROM) in boot applications. It has not been accessible from boot
scripts until now (due to not having a dedicated command and not being
supported by the hash infrstructure) limiting its applicability
outside of custom commands.

This adds the CRC16-CCITT (poly 0x1021, init 0x0) algorithm to the
list of available hashes and adds a new crc16_ccitt_wd_buf() to make
this possible.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[trini: Fix building crc16.o for SPL/TPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-08 20:18:44 -05:00
Philipp Tomsich
a740ee913e lib: merge CRC16-CCITT into u-boot/crc.h
This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure.  Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-08 20:18:32 -05:00
Aditya Prayoga
5ca84c6dd2 arm: mvebu: helios4: Reset uSOM onboard phy during board init
Similar to Clearfog rev 2.1, GPIO 19 also used to reset onboard ethernet
PHY.

This patch depend on
net: mvneta: Add GPIO configuration support
[URL: https://patchwork.ozlabs.org/patch/1007736/]

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
8d7d97e2d1 arm: mvebu: helios4: Enable SPI flash support
Enable SPI flash support under U-Boot and SPL. The ENV size and offset,
ported from U-Boot 2013.01 Marvell version: 2015_T1.0p16

To create U-Boot image for SPI flash, user would need to replace
* CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC with CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
* CONFIG_ENV_IS_IN_MMC with CONFIG_ENV_IS_IN_SPI_FLASH

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
16b6aefafd arm: mvebu: helios4: Reduce U-Boot image size
Remove unused I2C support in SPL and use simple_malloc functions to
reduce SPL image size.
Since Helios4 does not have any PCIe allocated on SerDes, remove PCI
support. MTD layer on top of SPI flash is not needed, remove it also.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
aad723b18f arm: mvebu: helios4: Enable mvebu GPIO
Make use of U-Boot's GPIO DM to control native GPIO and I2C IO expander.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
c209a65e9e arm: mvebu: helios4: Enable I2C and IO Expander
Enable Marvell I2C driver and I2C IO expander. Set default bus to
external I2C bus. Define I2C aliases in device tree so it can be
recognized by the driver.

Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:41 +01:00
Aditya Prayoga
a134d680ea arm: mvebu: helios4: mmc: move environment before 1M
Store the environment before 1M into the block device.
This constant is easier to remember, saves a little space,
and is in line with what SolidRun's 2018.01-based fork does for the
clearfog.

Signed-off-by: Josua Mayer <josua.mayer97@gmail.com>
[ Aditya Prayoga:
* Port forward]
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-By: Dennis Gilmore <dgilmore@redhat.com>
Reviewed-By: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:40 +01:00
Chris Packham
ebb1a59325 ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").

The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:

  ddr3: add missing txsdll parameter
  ddr3: fix tfaw timimg parameter
  ddr3: fix trrd timimg parameter
  merge ddr3 topology header file with mv_ddr_topology one
  mv_ddr: a38x: fix zero memory size scrubbing issue

The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef

    find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
        xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
                 -UCONFIG_APN806 -UCONFIG_MC_STATIC \
                 -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
                 -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
                 -UA70X0

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:40 +01:00
Tom Rini
c49aff3e66 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
2018-12-07 19:02:01 -05:00
Tom Rini
10d3e90f46 Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
 - bad pin definition for AXG Family
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Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
2018-12-07 19:01:09 -05:00
Andre Przywara
8a6121ea07 sunxi: update README.sunxi64
Now that the Allwinner port in the official mainline ARM Trusted
Firmware repository has reached feature parity with the "legacy" ATF
port, let's use the opportunity to update the Allwinner 64-bit build
instructions. This changes:
- Update ATF build instructions to use the mainline repo.
- Add quick command lines for TL;DR people.
- Mention Allwinner H6 build target.
- Mention pre-built FEL binaries.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-07 22:30:19 +05:30
Priit Laes
0fe52ae0b5 arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2-eMMC
The lime2 features a too large capacitor on the LDO3 output, which
causes the PMIC to shutdown when enabling power. To be able to still
boot up however, we must gradually enable power on LDO3 for this board.

We do this by enabling both the inrush quirk and the maximum slope the
AXP209 supports.

Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
8311e84b18 arm: sunxi: Reduce inrush current on Olimex OLinuXino-A20-Lime2
The lime2 features a too large capacitor on the LDO3 output, which
causes the PMIC to shutdown when enabling power. To be able to still
boot up however, we must gradually enable power on LDO3 for this board.

We do this by enabling both the inrush quirk and the maximum slope the
AXP209 supports.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
ef52605ebe power: axp209: Limit inrush current for broken boards
Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.

A fix appeared to be done with
commit 0e6e34ac8d ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").

The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.

While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.

To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
61436d502b power: axp209: Add support for voltage rate control on LDO3
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.

This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.

There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.

In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
3f7d76a7ed power: axp209: Reduce magic values by adding defines for LDO[234]
The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
f5eebc7925 power: axp209: Define the chip version mask
Use a define for the chip version mask on the axp209.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
048447ce4a power: axp209: Use BIT() macro
Use the standard BIT() macro for bitfield definitions in headers.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
c970e8954f sunxi: pmic_bus: Decrease boot time by not writing duplicate data
When we clear a pmic_bus bit, we do a read-modify-write operation.
We waste some time however, by writing back the exact samea value
that was already set in the chip. Let us thus only do the write
in case data was changed.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Olliver Schinagl
a8011eb84d sunxi: board: Print error after power initialization fails
Currently during init, we enable all power, then enable the dram and
after that check whether there was an error during power-up.

This makes little sense, we should enable power and then check if power
was brought up properly before we continue to initialize other things.

This patch moves the DRAM init after the power failure check.

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-12-07 22:24:33 +05:30
Tom Rini
3589025867 Merge branch '2018-12-06-master-imports'
- Various FAT fixes
- Hardware spinlock uclass
- DMA uclass
- Various am335x fixes
- DT resyncs for a number of TI platforms
- stm32 updates
2018-12-07 10:55:12 -05:00
Simon Goldschmidt
a9024dc18e arm: socfpga: imply SPL options instead of select
For a small SPL, it should be possible to build without SPI(-flash) drivers
or wihout MMC drivers.

For this to work, we have to change from 'select'ing options to 'imply'ing
them.

With this change, I can have SPL trimmed to my hard-wired starting method
(SPI-NOR or MMC) while still including all drivers in U-Boot.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-12-07 16:32:01 +01:00
Jean-Jacques Hiblot
532ededd5c board: ti: am57xx: remove USB platform code
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
6b3b0bf99f board: ti: dra7-evm: remove USB platform code
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
aec0081093 configs: am57xx_evm: Enable DM_USB and DM_USB_DEV
Enable DM_USB and DM_USB_DEV for AM57xx based boards.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
b491afa0f3 configs: enable DM_USB and DM_USB_DEV for all DRA7 platforms
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
d0af9eb501 dts: dra7x: make ocp2scp@4a080000 compatible with simple-bus
This is required when DM_USB is used, to bind the USB phys.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Vignesh R
c3cd5fc870 board; ti: am57xx: turn on USB clocks
Enable USB clocks in late init stage to support ports under DM_USB.

Signed-off-by: Vignesh R <vigneshr@ti.com>

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
24e261b39c board: ti: dra7xx-evm: turn on USB clocks in late init stage
For USB ports that use the Driver Model, turn on the clocks during the
late init stage.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
d66e54ac80 dwc3-generic: Add support for the TI DWC3 glue
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
668257e023 phy: Add a new driver for OMAP's USB2 PHYs
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Vignesh R
0752d7013a phy: ti-pip3-phy: Add support for USB3 PHY
Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.

Signed-off-by: Vignesh R <vigneshr@ti.com>

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
6c3af1f24e syscon: dm: Add a new method to get a regmap from DTS
syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
4d3825c191 usb: dwc3: Fix a compilation error with the edison defconfig
The error is:
In file included from include/part.h:10:0,
                 from include/usb.h:18,
                 from include/linux/usb/gadget.h:22,
                 from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
 void ide_led(uchar led, uchar status);

Fixing it by including common.h that defines the uchar type.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
93991cf196 dwc3-generic: Add select_dr_mode operation
The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
446e3a205b dwc3-generic: Handle the PHYs, the clocks and the reset lines
This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
004787aeed configs: evb-rk3328: Enable CONFIG_USB_DWC3
This is now required because the PHY operations used by xhci-dwc3 are part
of the dwc3 core.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
0131162439 dm: usb: create a new UCLASS ID for USB gadget devices
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.

Also move the generic DM code for USB gadgets in a separate file for
clarity.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
d648a50c0a dwc3: move phy operation to core.c
Those operations can be used for peripheral operation as well as host
operation.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

# Conflicts:
#	drivers/usb/dwc3/core.c
#	drivers/usb/host/xhci-dwc3.c
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
20bebd8666 dwc3_generic: do not probe the USB device driver when it's bound
The driver will be probed when usb_gadget_initialize() is called.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
ff8d755834 usb: udc: implement DM versions of usb_gadget_initialize()/_release()/_handle_interrupt()
When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.

usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
687ab54560 usb: introduce a separate config option for DM USB device
Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Jean-Jacques Hiblot
a06955ae1e usb: gadget: Do not call board_usb_xxx() directly in USB gadget drivers
Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-12-07 16:31:45 +01:00
Takeshi Kihara
5055a4e900 ARM: rmobile: Fix to enable icache early in Gen3
This patch fixes the problem that u-boot will not start unless icache is
enabled early.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-07 16:31:15 +01:00
Takeshi Kihara
10854bcc25 ARM: rcar_gen3: fix protection area access error
This patch fixes the problem that "main memory domain AXI secure access
protection error" occurs. Exclude the area (0x43f00000 to 0x47DFFFFF)
set by DBSC from the map area.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-07 16:31:15 +01:00
Hiroyuki Yokoyama
23b9b36ae3 ARM: rcar_gen3: fix protection area access error at Cortex-A53
This patch fixes the problem that "main memory domain AXI secure
access protection error" occurs when booting Cortex-A53. Exclude
the area (0x43f00000 to 0x47DFFFFF) set by DBSC from the map area.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-07 16:31:15 +01:00