Commit graph

20 commits

Author SHA1 Message Date
Simon Glass
25ab4b0303 dm: i2c: Provide an offset length parameter where needed
Rather than assuming that the chip offset length is 1, allow it to be
provided. This allows chips that don't use the default offset length to
be used (at present they are only supported by the command line 'i2c'
command which sets the offset length explicitly).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
2015-01-29 17:09:53 -07:00
Simon Glass
f9a4c2da72 dm: i2c: Rename driver model I2C functions to permit compatibility
Add a dm_ prefix to driver model I2C functions so that we can keep the old
ones around.

This is a little unfortunate, but on reflection it is too difficult to
change the API. We can undo this rename when most boards and drivers are
converted to use driver model for I2C.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-01-29 17:09:53 -07:00
Simon Glass
b0e6ef4640 dm: i2c: tegra: Convert to driver model
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:

   - CONFIG_SYS_I2C_INIT_BOARD
   - CONFIG_I2C_MULTI_BUS
   - CONFIG_SYS_MAX_I2C_BUS
   - CONFIG_SYS_I2C_SPEED
   - CONFIG_SYS_I2C

This has been tested on:
- trimslice (no I2C)
- beaver
- Jetson-TK1

It has not been tested on Tegra 114 as I don't have that board.

Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-11 13:18:44 -07:00
Stephen Warren
803d01edc2 ARM: tegra: Tegra30 pinmux cleanup
This renames all the pinmux pins, drive groups, and functions so they
have a prefix which matches the type name. These lists are also auto-
generated using scripts that were also used to generate the kernel
pinctrl drivers. This ensures that the lists are consistent between the
two.

The entries in tegra30_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

This introduces a few changes to pin/group/function naming and the set of
available functions for each pin. The new values now exactly match the
TRM; the chip documentation. I adjusted one entry in
pinmux-config-cardhu.h due to this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-04-17 08:41:05 -07:00
Stephen Warren
70ad375ee4 ARM: tegra: Tegra20 pinmux cleanup
This renames all the Tegra20 pinmux pins and functions so they have a
prefix which matches the type name.

The entries in tegra20_pingroups[] are all updated to remove the columns
which are no longer used.

All affected code is updated to match.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-04-17 08:41:05 -07:00
Stephen Warren
dfb42fc95d ARM: tegra: pinmux naming consistency fixes
Clean up the naming of pinmux-related objects:
* Refer to drive groups rather than pad groups to match the Linux kernel.
* Ensure all pinmux API types are prefixed with pmux_, values (defines)
  are prefixed with PMUX_, and functions prefixed with pinmux_.
* Modify a few type names to make their content clearer.
* Minimal changes to SoC-specific .h/.c files are made so the code still
  compiles. A separate per-SoC change will be made immediately following,
  in order to keep individual patch size down.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-04-17 08:41:05 -07:00
Alban Bedel
8f38038193 ARM: tegra: Add the Tamonten™ NG Evaluation Carrier board
Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-12-18 10:19:49 -07:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Tom Warren
c9aa831ee2 Tegra: MMC: Add DT support to MMC driver for all T20 boards
tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc.
Tested on Seaboard, fully functional.

Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Lucas Stach
0cd10c7abf tegra20: rework UART GPIO handling
Rename board provided gpio_config_uart() to
gpio_early_init_uart() as it does the same thing as the equally
called function provided by the uart-switch code. This allows
to simply call this function in early board init whether or not
we are building with CONFIG_UART_SWITCH defined.

Also provide a weak symbol for this function, to avoid the
need to provide this function for boards that don't need any
fixup.

This patch supersedes the earlier posted
"tegra: convert gpio_config_uart to weak symbol".
Build tested with MAKEALL -s tegra20

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:07 -07:00
Tom Warren
150c24936b Tegra20: Move some include files to arch-tegra for sharing with Tegra30
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-15 11:54:06 -07:00
Tom Warren
29f3e3f248 Tegra: Change Tegra20 to Tegra in common code, prep for T30
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2012-09-10 13:01:24 -07:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Tom Warren
1e2d785975 tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2012-07-09 22:44:32 +02:00
Thierry Reding
7925454305 tegra: Use SD write-protect GPIO on Tamonten
GPIO PI6 can be used to obtain the write-protect status of an SD card
inserted into the SD slot.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
22d58506f5 tegra: Implement gpio_early_init() on Tamonten
The PI4 GPIO is used on Tamonten to reset carrier board peripherals.
Power sequencing hardware on the carrier pulls the reset low before
powering up the Tegra, and the CPU is supposed to signal readiness,
and therefore bring peripherals out of reset by pulling PI4 high.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Thierry Reding
ed900c55c3 tegra: Rework Tamonten support
This commit uses the common Tegra board implementation instead of
duplicating a lot of the code. In addition, the Plutux and Medcom
specific board files can be removed as the MMC/SD setup is common
among all Tamonten-based boards.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09 22:44:32 +02:00
Simon Glass
f448302167 tegra: Use funcmux for MMC on tamonten
Use the new funcmux_select() feature to set up the MMC pin mux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-02-12 10:11:22 +01:00
Simon Glass
f46a945653 tegra: Move boards over to use arch-level board UART function
Now that we can set up the UART in common tegra code, make the boards
use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:32 +01:00
Thierry Reding
b1c0c73619 tegra2: Add common Avionic Design Tamonten support.
Tamonten is an NVIDIA Tegra2-based SO-DIMM processor module that is
derived from the Harmony reference design.

Changes in v3:
  * Remove unused gpio_config_uart().
  * Remove call to tegra2_start().
  * Use new tegra2_mmc_init().

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-12-24 10:23:31 +01:00