UART booting is supported on this SoC, but via UART3 rather than UART1.
Because of this we must change the board to use UART3 for all console
access (only one UART is exposed on this board and a slight HW mod is
required to switch UARTs).
Signed-off-by: Minal Shah <minal.shah@ti.com>
[trini: Make apply to mainline, reword commit]
Signed-off-by: Tom Rini <trini@ti.com>
With changes to increase the size of the device tree (required to move
more data out of the kernel and into DT), loading the args at the old
address leads to us overwriting things later on. To correct this, load
the args file to where we load the device tree anyhow. This is also
safe for non-DT booting as in either case we use r2 to pass in the
location of things.
Signed-off-by: Tom Rini <trini@ti.com>
Increase the tested memory region for mtest and define
CONFIG_SYS_MEMTEST_SCRATCH for CONFIG_SYS_ALT_MEMTEST
Signed-off-by: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Silent u-boot and no bootdelay
Signed-off-by: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new tricordereeprom command can read and write the eeprom for hardware
detection on tricorder devices.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Before we always ran 'mtdparts default' which also set the mtdparts and mtdids
environment. But if we changed that values by intention we will overwrite
them with our default values. This is obviously bad!
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new flash layout respects posible bad blocks in sectors reserved for e.g.
SPL, u-boot, kernel, env a.s.o.
Additionally this patch prepares for U-Boot Falcon mode for boot time saving.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
- switch to correct ecc layout used by the RBL
enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
- update default environment
- change A2CR to correct value for UART boot mode
- adapt cs3cfg timings for nand
- change LED bootmode signalization
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEPv2 board and the IGEP COM Module use a TI
OMAP35xx/DM37xx processor, is better to rename its board
config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEP COM AQUILA use a TI AM335x processor is better
to rename its board config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Enable the bootcount driver for am335x in general. We leave adding a
bootlimit and altbootcmd to the environment to the board ports.
Signed-off-by: Tom Rini <trini@ti.com>
Remove Prodrive pdnb3 board (including the scpu variant) support
from mainline. As its unmaintained and not needed any more for
quite some time.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Martijn de Gouw <martijn.de.gouw@prodrive.nl>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
OMAP5 boards may have both eMMC (on MMC2) and an SD slot (on MMC1). We
Update the default bootcmd to match what happens on AM335x where we try
SD first, and then eMMC. In this case however, the hardware layout used
for powering both of these means that in the kernel eMMC shall be found
first as it is powered by a fixed regulator and SD found second as SD is
powered via the palmas which will result in deferred probing.
Tested-by: Aparna Balasubramanian <aparnab@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Upon further inspection and review and chatting with kernel folks, what
happens here is that what mmcblk# a device gets is based on probe order.
So a system with an SD card inserted with place eMMC on mmcblk1, but
without an SD card, it will be on mmcblk0. So U-boot can only provide a
best guess. In this case, if no SD card is present, we would want to
pass mmcblk0p2 still. If an SD card is present, it woudl be able to
provide a uEnv.txt that would be loaded (even if the kernel is NOT
there) which can still update mmcroot variable.
This reverts commit 827512fb11.
Cc: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Tom Rini <trini@ti.com>
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
omap1510inn is orphan and has been for years now.
Reove it and, as it was the only arm925t target,
also remove arm925t support.
Update doc/README.scrapyard accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
To enable hypervisors utilizing the ARMv7 virtualization extension
on the Versatile Express board with the A15 core tile, we add the
required configuration variable.
Also we define the board specific smp_set_cpu_boot_addr() function to
set the start address for secondary cores in the VExpress specific
manner.
There is no need to provide a custom smp_waitloop() function here.
This also serves as an example for what to do when adding support for
new boards.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
While actually switching to non-secure state is one thing, another
part of this process is to make sure that we still have full access
to the interrupt controller (GIC).
The GIC is fully aware of secure vs. non-secure state, some
registers are banked, others may be configured to be accessible from
secure state only.
To be as generic as possible, we get the GIC memory mapped address
based on the PERIPHBASE value in the CBAR register. Since this
register is not architecturally defined, we check the MIDR before to
be from an A15 or A7.
For CPUs not having the CBAR or boards with wrong information herein
we allow providing the base address as a configuration variable.
Now that we know the GIC address, we:
a) allow private interrupts to be delivered to the core
(GICD_IGROUPR0 = 0xFFFFFFFF)
b) enable the CPU interface (GICC_CTLR[0] = 1)
c) set the priority filter to allow non-secure interrupts
(GICC_PMR = 0xFF)
Also we allow access to all coprocessor interfaces from non-secure
state by writing the appropriate bits in the NSACR register.
The generic timer base frequency register is only accessible from
secure state, so we have to program it now. Actually this should be
done from primary firmware before, but some boards seems to omit
this, so if needed we do this here with a board specific value.
The Versatile Express board does not need this, so we remove the
frequency from the configuration file here.
After having switched to non-secure state, we also enable the
non-secure GIC CPU interface, since this register is banked.
Since we need to call this routine also directly from the smp_pen
later (where we don't have any stack), we can only use caller saved
registers r0-r3 and r12 to not mess with the compiler.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
This patch add support for a new Samsung board Trats2.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
If, in CONFIG_BOOTCOMMAND, the environment switches both the mmcdev
and bootpart variables to refer to MMC device 1, it would make sense
that the mmcroot env variable should switch to that device as well.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
dra7xx_evm has eMMC and the default environment can be stored in it.
So enabling saveenv command and the configs to store environment in eMMC.
Tested on DRA752 ES1.0
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>
