Commit graph

415 commits

Author SHA1 Message Date
Igor Opaniuk
1b899a8041 imx: nandbcb: refactor update function
Move code for writing FCB/DBBT pages to a separate function

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:40 +01:00
Igor Opaniuk
dad30dd72b imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCB

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03 21:49:28 +01:00
Oliver Graute
eef72440db imx: support i.MX8QM ROM 7720 a1 board
Add i.MX8QM ROM 7720a1 board support

Boot log as below:
U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200)

CPU:   NXP i.MX8QM RevB A53 at 1200 MHz

Model: Advantech iMX8QM Qseven series
Board: ROM-7720-A1 4GB
Build: SCFW 65afe5f6
Boot:  SD2
DRAM:  4 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
Net:   eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1
, eth-1: ethernet@5b050000
Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03 21:18:00 +01:00
Hannes Schmelzer
c04ac5bd40 board/BuR/brppt2: initial commit
This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03 21:17:55 +01:00
Anatolij Gustschin
910b2fca97 imx8: output SECO-FW and ATF commit IDs
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Ye Li
264977d1c2 mach-imx: Adding new argument for SIP call interface
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.

Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
7e2db74231 imx8: Add AHAB secure boot support
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.

Also add image authentication call when loading container images.

Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9d86dbd9cf imx: spl: implement spl_boot_mode for i.MX7/8/8M
It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
2dfecdd1ed imx: imx8mq: add init_nand_clk
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
eeca15a50a imx8m: clock: improve irq response latency
Improve the IRQ response latency by setting GIC root clock source to
sys_pll2_200m from osc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Peng Fan
9e09445549 imx8m: imx8mq: get chip rev for B1 revision
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa. update get_cpu_rev to support it,
and enable ocotp clock to access ocotp.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Sébastien Szymanski
b72dd938ec imx6ul: opos6ul: migrate to DM_ETH
Migrate to DM_ETH and remove code that is no longer necessary.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-11-03 17:04:16 +01:00
Lukasz Majewski
8e64181a99 ARM: imx: Convert mccmon6 to use DM/DTS in the u-boot proper
This commit converts mccmon6's u-boot proper (in a single commit to avoid
build breaks) to use solely DM/DTS.

The DTS description of the mccmon6 has been ported from Linux kernel
(v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-11-03 17:04:16 +01:00
Claudius Heine
dde31a14ec ARM: imx: Use IMX6_SRC_GPR10_BMODE instead of magic number
Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Claudius Heine
e01c8cfe57 ARM: imx: Fix bmode detection from grp10
imx6_is_bmode_from_gpr9 always returns false, because
IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return.

This moves the function body into imx6_src_get_boot_mode, since that is the
only one using it and it is on the same abstraction level (accessing
registers directly).

Signed-off-by: Claudius Heine <ch@denx.de>
2019-11-03 17:04:16 +01:00
Parthiban Nallathambi
6aa874911e i.MX6: nand: extend nandbcb command for imx6UL(L)
Firmware Configuration Block(FCB) for imx6ul(l) needs to be
BCH encoded.

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Acked-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 17:04:16 +01:00
Fabio Estevam
fa64df4602 mx6: clock: Introduce disable_ipu_clock()
Introduce disable_ipu_clock(). This is done in preparation for
configuring the NoC registers on i.MX6QP in SPL.

Afer the NoC registers are set the IPU clocks can be disabled.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:51 +01:00
Fabio Estevam
1be51fed56 mx6: clock: Use setbits_le32()
The code can be made simpler by using setbits_le32(), so switch
to it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03 13:16:41 +01:00
Sjoerd Simons
b4eca2d787 imx :hab: Add hab version command
THe RVT data includes a major and minor version in its header
parameter. Add a new command to print this out.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
2019-10-14 09:31:41 +02:00
Fabio Estevam
d9fba73a88 imx: mmdc_size: Allow building it for i.MX7ULP
i.MX7ULP uses the same MMDC controller IP as found on i.MX53
and i.MX6, so build mmdc_size.c for i.MX7ULP as well.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-14 09:31:41 +02:00
Fabio Estevam
a02a5fb6ff imx: mmdc_size: Fix checkpatch warnings
The original imx_ddr_size() implementation had some
issues reported by checkpatch like this:

CHECK: Prefer kernel type 'u32' over 'uint32_t'
#127: FILE: arch/arm/mach-imx/mmdc_size.c:16:
+	uint32_t	ctl;

WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
#151: FILE: arch/arm/mach-imx/mmdc_size.c:40:
+	unsigned ctl = readl(&mem->ctl);

Fix all of them.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-14 09:31:41 +02:00
Fabio Estevam
89bc388a32 imx: Place imx_ddr_size() into a separate file
Place imx_ddr_size() into a separate file.

The motivation for doing this is to be able to easily reuse
imx_ddr_size() on i.MX7ULP.

Currently imx_ddr_size() is inside arch/arm/mach-imx/cpu.c, which
is not built for i.MX7ULP.

Changing the logic to allow building cpu.c for i.MX7UP would
require adding several ifdef's, leading to a not a very elegant
solution.

To allow better reuse, just place imx_ddr_size() into a common
mmdc_size.c file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-14 09:31:33 +02:00
Lukasz Majewski
0bcb11fa1f imx: tpc70: Convert TPC70 (imx6q) board to use DM/DTS in SPL and u-boot
This patch converts the TPC70 to use driver model and device tree
description in both SPL and u-boot proper.

Notable changes (DM/DTS conversion):

- PINCTRL{_IMX6}
- DM_I2C
- enable 'regulator' and 'pmic' commands
- DM_MMC and BLK (USDHC)
- DM_ETH
- DM WDT (including SYSRESET)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-13 22:49:12 +02:00
Shawn Guo
6802d7951c Add i.MX7D based Meerkat96 board support
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.

https://www.novtech.com/products/meerkat96.html
https://www.96boards.org/product/imx7-96/

The initial supported/tested devices include:
 - Debug serial
 - SD
 - USB Host (with Ethernet)

With these support, it's good enough for loading Linux Kernel from SD or
Ethernet over USB.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-10-13 22:49:11 +02:00
Adam Ford
63ce94b16b Revert "spl: imx6: Let spl_boot_device return USDHC1 or USDHC2"
Apologies to everyone whose board I broke by attempting to return
MMC1 or MMC2. I misunderstood how the MMC indexing worked.

This reverts commit 14d319b185.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-10-08 16:36:37 +02:00
Stefano Babic
83afe3b1c9 Revert "imx: mmc_env: update runtime SD/MMC boot env device"
This reverts commit 34f2feb92db6146831bafa696b7b46785c9f6b10.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:37 +02:00
Stefano Babic
d714a75fd4 imx: replace CONFIG_SECURE_BOOT with CONFIG_IMX_HAB
CONFIG_SECURE_BOOT is too generic and forbids to use it for cross
architecture purposes. If Secure Boot is required for imx, this means to
enable and use the HAB processor in the soc.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:37 +02:00
Parthiban Nallathambi
4ee0ff1268 imx: nandbcb: include long help only when enabled
conditionally include long help text when enabled

Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:37 +02:00
Peng Fan
d1c07785fd imx8: Add support to get container image set size
To avoid hardcoded offset when adding u-boot.cnt to flash.bin, we use
flexible offset which is calculated based on the size of the container
image generated int the first stage. And pad u-boot.cnt at 1KB
alignment.

So add code to get the offset when SPL loading u-boot.cnt.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
9b15ce9193 imx: Add i.MX8MM EVK board support.
Add board and SoC dts
Add ddr training code
support SD/MMC/GPIO/PINCTRL/UART

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
e663c703b1 imx8m: soc: probe clock device in arch_cpu_init_dm
Because we need to get cpu freq in print_cpuinfo at very early stage,
so we need to make sure the ccm be probed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
e89d211f30 imx: mmc_env: update runtime SD/MMC boot env device
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port.
To directly return devno, we could avoid add board specific code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
5f24d0cb9c imx8m: add clk support for i.MX8MM
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Mostly will be done clk dm driver,
but such as DRAM part, we still use non clk dm driver, because we
have limited sram.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
8838cdf10d imx8m: restructure clock.h
i.MX8MQ and i.MX8MM use different analog pll design, but they
share same ccm design.
Add clock_imx8mq.h for i.MX8MQ
keep common part in clock.h

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
2005916f54 imx8m: rename clock to clock_imx8mq
i.MX8MQ and i.MX8MM has totally different pll design, so
rename clock to clock_imx8mq.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
d2041725e8 imx8m: restrict reset_cpu
Make reset_cpu only visible when CONFIG_SYSRESET not defined
or CONFIG_SPL_BUILD.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
0528ba0e1c imx8m: soc: enable SCTR clock before timer init
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Ye Li
b3cf0a8f03 imx8m: Configure trustzone region 0 for non-secure access
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
dbb2b7e508 imx8m: set BYPASS ID SWAP to avoid AXI bus errors
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
59efa6b52b imx8m: Fix MMU table issue for OPTEE memory
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
various memory issue in u-boot.
The fail address register and int_status register in trustzone has logged
that speculative access from u-boot.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
78db9a5463 imx: add get_cpu_rev support for i.MX8MM
There are several variants based on i.MX8MM, add the support in
get_cpu_rev

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
6c646b3de4 imx: spl: add spl_board_boot_device for i.MX8MM
Differnet board has different controller used, it is
hard to use one layout for them all.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
65a6c50095 imx: add i.MX8MM cpu type
Add i.MX8MM cpu type and related helper functions

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
1b1eaa0e12 imx: add IMX8MM kconfig entry
Add IMX8MM kconfig entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
d968ae7ed6 imx: add IMX8MQ kconfig entry
Add IMX8MQ kconfig entry, preparing support IMX8MM

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Peng Fan
478f944a96 imx8m: add image cfg for i.MX8MM lpddr4
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then
we could not reuse imximage.cfg, so create a new one.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Frieder Schrempf
fa99af41e0 imx: mkimage_fit_atf: Fix FIT image for correct boot order
Fix the FIT image metadata for i.MX8 to result in the intended boot
order (SPL -> ATF -> U-Boot).

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:36:36 +02:00
Stefan Roese
2a9f86b277 ARM: imx: arch/arm/mach-imx/spl_qspi.cfg
Similar to "spl_sd.cfg", this patch introduces "spl_qspi.cfg" so that
all i.MX6 based boards can use it, when they use SPL and QSPI boot
mode.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:36 +02:00
Stefan Roese
d10d1386a0 ARM: imx: Add QSPI boot mode for i.MX6UL/ULL
This patch adds the missing boot mode detection for QSPI boot on
i.MX6UL/ULL. Without it, booting with SPL from QSPI NOR does not work.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-10-08 16:36:36 +02:00
Breno Matheus Lima
5b20d141f2 imx: Kconfig: Reduce default CONFIG_CSF_SIZE
The default CSF_SIZE defined in Kconfig is too high and SPL cannot
fit into the OCRAM in certain cases.

The CSF cannot achieve 0x2000 length when using RSA 4K key which is
the largest key size supported by HABv4.

According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices"
it's recommended to pad CSF binary to 0x2000 and append DEK blob to
deploy encrypted boot images.

As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060
which should cover both CSF and DEK blob length.

Update default_image.c and image.c to align with this change and avoid
a U-Boot proper authentication failure in HAB closed devices:

Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR:  image authentication fail

Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets")

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
772b55723b imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon mode
This change tries to fix the following problem:

- The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR
  memory.
  As a result the spl_boot_device() will return SPI-NOR as a boot device
  (which is correct).

- The problem is that in 'falcon boot' the eMMC is used as a boot medium to
  load kernel from its partition.
  Calling spl_boot_device() will break things as it returns SPI-NOR device.

To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is
introduced to handle this special use case. By default it is not defined,
so there is no change in the legacy code flow.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:36:36 +02:00
Lukasz Majewski
e95b4bdd8d DM: SPI: Convert display5 to use SPI with DM/DTS (but no in SPL)
The DM/DTS support for SPI is disabled on purpose for SPL, as it is not
supported as of time of this conversion.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
32e0751383 DM: eth: Switch display5 board to use DM_ETH
After this commit the display5 device would use FEC driver supporting
driver model (DM_ETH).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
19e874c6d7 DM: mmc: Switch display5 board to use DM_MMC and BLK (USDHC)
After this commit the display5 device would use eMMC driver supporting
driver model (DM_MMC and BLK).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Lukasz Majewski
dac9a8f8a2 DM: I2C: Switch display5 board to use DM_I2C
After this commit the display5 device would use I2C driver supporting
driver model (DM_I2C).

The 'i2c' and 'eeprom' commands now use DM I2C drivers and initialize
on-bus devices according to device tree description.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08 16:35:59 +02:00
Fabio Estevam
004eee86f1 pico-imx6: Add initial support
Add the initial support for the pico-imx6 variants.

DDR initialization is based on the TechNexion's U-Boot code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08 16:35:59 +02:00
Fabio Estevam
b8bffab76f mx6: clock: Allow enable_ipu_clock() to be built for SPL code
Allow enable_ipu_clock() to be built for SPL code. This is done
in preparation for configuring the NoC registers on i.MX6QP in SPL.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08 16:35:59 +02:00
Peng Fan
bae4e8cb92 imx8: cpu: fix mac fuse word for i.MX8QM
i.MX8QM does not share same FUSE MAC word index, so update the word
index for i.MX8QM.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
43c5087385 imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
Move cpu desc code to cpu driver directory and name it imx8_cpu.c
No functional change.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
94e4d028b2 imx8: fdt: add optee node
Add OP-TEE device tree node for Linux according to args passed from ATF.
If ATF has been built with OP-TEE running, boot_pointer[1] will indicate
that.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
fefe051335 imx8: save args passed from ATF
We use information from ATF to know whether OP-TEE is running or not.
So save args passed from ATF.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
01cacf9682 imx8: fdt: configure sid for masters
On i.MX8QM, sid is programmable, so we could program sid according the
value encoded in device tree.

This patch support legacy bindings which are still being used by XEN
and new bindings used by Linux Kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
9f779fa410 imx8: disable node when the resource is not owned
When resource is not assigned to non-secure Linux, if linux continue
to use the node, linux may crash or hang. So need to set the node
status to disabled for not owned resources.

The resource id is in the power-domains property in device tree,
so parse the power-domains property to get the resource id and
use scfw api to check whether it is owned by current partition.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
8f99438b09 imx8qm: power up SMMU
There is SMMU in i.MX8QM. To use SMMU in Linux, need power up it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Ye Li
bcf94abd1c imx8: Probe the SCU driver by using uclass function
Since SCU MU driver has been bound in dm_init, so we don't need to
bind it again. Just replace by using uclass function to probe it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:59 +02:00
Peng Fan
700315c9ac imx: add container target
To support SPL loading container file, add a new Makefile target,
and introduce a new Kconfig file to source the cfg file which
will be parsed by mkimage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:58 +02:00
Peng Fan
7b86cd4274 imx8: support parsing i.MX8 Container file
Add parsing i.MX8 Container file support, this is to let
SPL could load images in a container file to destination address.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:58 +02:00
Breno Matheus Lima
5f2fe3b93a Kconfig: Migrate CONFIG_CSF_SIZE to Kconfig
Move CONFIG_CSF_SIZE to Kconfig and define default value as 0x4000.

mx8mqevk requires 0x2000 add this configuration in imx8mq_evk_defconfig
file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:35:58 +02:00
Ye Li
971a71e114 i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT
On i.MX7ULP B0, there is change in NIC clock dividers architecture.
On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but
on B0 they are parallel with NIC1 DIV. So now the dividers are independent.
This patch modifies the scg_nic_get_rate function according to this change.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
df3572e930 i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chip
The normal target frequency for ULP A7 core is 500Mhz, but now ROM
set the core frequency to 413Mhz. So change it to 500Mhz in u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
e25dc290aa i.MX7ULP: Add CPU revision check for B0
Since there is no register for CPU revision, we use ROM version to
check the A0 or B0 chip.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eae4e0f3c1 i.MX7ULP: Workaround APLL PFD2 to 345.6Mhz
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
to workaround the problem. The correct fix should let GPU handle the
clock rate in kernel.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
eb6d2e5920 i.MX7ULP: Fix SPLL/APLL clock rate calculation issue
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
61bf6173cd i.MX7ULP: Fix wrong i2c configuration name
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ye Li
911d7d356a i.MX7ULP: Add CONFIG_MX7ULP to kconfig
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. Add this entry to cpu's kconfig.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
3ed6734e69 i.MX7ULP: Correct the clock index
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Bai Ping
7777406a8a i.MX7ULP: Fix system reset after a7 rtc alarm expired.
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Peng Fan
e92fca66a3 imx: i.MX7ULP: add get_boot_device
Add get_boot_device for i.MX7ULP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:35:16 +02:00
Robert Hancock
06f5b5a5fc ARM: imx: Support larger SPL size on IMX6DQ
Previously the SPL size on all iMX6 platforms was restricted to 68KB
because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
other iMX6 variants have 256KB of OCRAM. Add an option
CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
don't need to support the SL/DL variants. This allows for an SPL size of
196KB, which makes it much easier to use configurations such as SPL with
driver model and FDT control.

Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08 16:35:16 +02:00
Ricardo Salveti
01fc7e7b87 spl: imx: only use HAB if spl fit signature is not enabled
There is no need to use HAB for FIT signature validation when
SPL_FIT_SIGNATURE is also enabled, as that will be validated via the
normal U-Boot signed FIT image flow.

This allows having SPL validated by HAB and the payloads to follow
being validated with FIT signatures only.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08 16:35:16 +02:00
Ricardo Salveti
a3f5c79507 imx: apalis_imx6: select MX6Q via Kconfig
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q
variants, which are quite similar and already managed via only one
dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in
order to automatically enable the HAS_CAAM and MX6_SMP features.

Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08 16:35:16 +02:00
Peng Fan
81ae46c2e6 imx: add i.MX6ULZ cpu type
Add i.MX6ULZ cpu type and helper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08 16:33:45 +02:00
Simon Glass
e7dcf5645f env: Drop environment.h header file where not needed
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
0ac7d722ed env: Move get/set_default_env() to env.h
Move these functions to the new header file and rename set_default_env()
to env_set_default() so that it has a consistent env_ prefix.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
7b51b576d6 env: Move env_get() to env.h
Move env_get() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Simon Glass
9fb625ce05 env: Move env_set() to env.h
Move env_set() over to the new header file.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2019-08-11 16:43:41 -04:00
Igor Opaniuk
9de5eb23dc colibri-imx6ull: support building with DM_VIDEO=y
1. This fixes linking issues when building with DM_VIDEO enabled mxsfb
driver.
2. Provide proper defines for both VIDEO=y and DM_VIDEO=y.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-29 00:11:54 +02:00
Tom Rini
df9a7a195b u-boot-imx-20190719
- CCF for i.MX6
 - nandbcb command to write SPL into NAND
 - Switch to DM (i.MX28)
 - Boards: Toradex, engicam, DH
 - Fixes for i.MX8
 - Fixes for i.MX7ULP
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
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Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20190719

- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-27 09:35:05 -04:00
Patrick Delaunay
e21e3ffdd1 psci: Fix warnings when compiling with W=1
This patch solves the following warnings:
arch/arm/mach-stm32mp/psci.c:

warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes]

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-24 14:15:38 -04:00
Ludwig Zenz
86e59530be ARCH: imx: Call sata_remove() not on imx6 duallite/solo boards
For a single binary approach for imx6 quad/dual/duallite/solo it
is necessary to enable CONFIG_SATA for quad/dual. On the other hand
on imx6 duallite/sole SATA is not available.
Therefore sata_remove() is skipped according to a blacklist scheme.

Adding further imx derivates is probably not recessary as they are
usually not pin-compatible and therefore a different board with its
own configuration.

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
2019-07-19 20:32:24 +02:00
Ye Li
5fdef6c4c5 imx6dq: Fix chip version issue for rev1.3
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not
aligned on silicon revision 1.3. So update get_cpu_rev to correct the
revision.

0x00630002 Silicon revision 1.2
0x00630005 Silicon revision 1.3
0x00630006 Silicon revision 1.6

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:32:24 +02:00
Anatolij Gustschin
d87b2486e6 arm: imx8: don't duplicate build_info()
Move build_info() to common place.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:14:50 +02:00
Anatolij Gustschin
64b5f46975 arm: imx8: factor out uart init code
New imx8 boards started adding duplicated UART init code.
Factor out this to common function sc_pm_setup_uart().

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-19 20:14:50 +02:00
Adam Ford
14d319b185 spl: imx6: Let spl_boot_device return USDHC1 or USDHC2
Currently, when the spl_boot_device checks the boot device, it
will only return MMC1 when it's either sd or eMMC regardless
of whether or not it's MMC1 or MMC2.  This is a problem when
booting from MMC2 if MMC isn't being manually configured like in
the DM_SPL case with SPL_OF_CONTROL.

This patch will check the register and return either MMC1 or MMC2.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-19 14:53:50 +02:00
Shyam Saini
1d43e24b94 i.MX6: nand: add nandbcb command for imx
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.

It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.

It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.

So, cmd_nandbcb implemented in arch/arm/mach-imx

BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.

On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
  1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks

for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.

Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.

Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
2019-07-19 14:51:25 +02:00
Tom Rini
c76c93a3d5 configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY).  In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-11 14:11:18 -04:00
Tom Rini
f5e73a34ed Merge tag 'mmc-6-23' of https://github.com/MrVan/u-boot
- Pull in the series to split fsl_esdhc for i.MX/non-i.MX cleanly
2019-07-08 15:59:41 -04:00
Breno Matheus Lima
5760069ae8 mx6sl: hab: Fix pu_irom_mmu_enabled address
According to hab.c code we have to notify the ROM code if the MMU is
enabled or not. This is achieved by setting the "pu_irom_mmu_enabled"
to 0x1.

The current address in hab.c code is wrong for i.MX6SL, according to ROM
map file the correct address is 0x00901c60.

As we are writing in the wrong address the ROM code is not flushing the
caches when needed, and the following HAB event is observed in certain
scenarios:

--------- HAB Event 1 -----------------
event data:
        0xdb 0x00 0x14 0x41 0x33 0x18 0xc0 0x00
        0xca 0x00 0x0c 0x00 0x01 0xc5 0x00 0x00
        0x00 0x00 0x07 0xe4

STS = HAB_FAILURE (0x33)
RSN = HAB_INV_SIGNATURE (0x18)
CTX = HAB_CTX_COMMAND (0xC0)
ENG = HAB_ENG_ANY (0x00)

Update MX6SL_PU_IROM_MMU_EN_VAR to address this issue.

Reported-by: Frank Zhang <frank.zhang@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-06-27 14:10:40 +02:00
Yangbo Lu
e37ac717d7 Convert to use fsl_esdhc_imx for i.MX platforms
Converted to use fsl_esdhc_imx for i.MX platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Acked-by: Jason Liu <Jason.hui.liu@nxp.com>
2019-06-23 14:18:34 +08:00
Tom Rini
529faf80c3 u-boot-imx-20190612
--------------------
 
 - Board fixes:
 	- imx6logic
 	- wandboard
 	- mx6sabre boots again
 	- imx8qm_mek
 	- pico-* boards
 	- Toradex apalis / colibri
 	- engicam imx6 (environment)
 	- KP MX53
 	- opos6ul
 - Switch to DM:
 	- vining2000
 	- dh MX6
 	- Toradex colibri i.MX7
 	- Novena
 - Security : fix CSF size for HAB
 - Other:
       - imx: fix building for i.mx8 without spl
       - pcie and switch to DM
 
       mx6sabreauto: Enable SPL SDP support
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Merge tag 'u-boot-imx-20190612' of git://git.denx.de/u-boot-imx

u-boot-imx-20190612
--------------------

- Board fixes:
	- imx6logic
	- wandboard
	- mx6sabre boots again
	- imx8qm_mek
	- pico-* boards
	- Toradex apalis / colibri
	- engicam imx6 (environment)
	- KP MX53
	- opos6ul
- Switch to DM:
	- vining2000
	- dh MX6
	- Toradex colibri i.MX7
	- Novena
- Security : fix CSF size for HAB
- Other:
      - imx: fix building for i.mx8 without spl
      - pcie and switch to DM

      mx6sabreauto: Enable SPL SDP support
2019-06-11 13:41:24 -04:00