Commit graph

791 commits

Author SHA1 Message Date
Lei Wen
a03774ed88 mvmfp: add MFP configuration support for PANTHEON
This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
896e2ca912 ARM: Add Support for Marvell Pantheon Familiy SoCs
Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf

SoC versions Supported:
1) PANTHEON920          (TD)
2) PANTHEON910          (TTC)

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Lei Wen
cf946c6d09 mv: seperate kirkwood and armada from common setting
Since there are lots of difference between kirkwood and armada series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.

This patch move the kirkwood only driver definitoin in mv-common to
the <soc_name>/config.h.

This patch is tested with compilation for armada100 and guruplug.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-02-21 08:30:55 +01:00
Wolfgang Denk
495df3bad9 ARM: fix write*() I/O accessors
Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb
and friends." introduced I/O accessors with memory barriers.
Unfortunately the new write*() accessors introduced a bug:

The problem is that the argument "v" gets evaluated twice.  This
breaks code like used here (from "drivers/net/dnet.c"):

	for (i = 0; i < wrsz; i++)
		writel(*bufp++, &dnet->regs->TX_DATA_FIFO);

Use auxiliary variables to avoid such problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Alexander Holler <holler@ahsoftware.de>
Cc: Dirk Behme <dirk.behme@googlemail.com>
2011-02-21 08:30:55 +01:00
Alexander Stein
6087f1a90c arm relocation: Fix calculation of board_init_r
Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
2011-02-21 08:30:55 +01:00
Tom Warren
3f82b1d3ab arm: Tegra2: Add basic NVIDIA Tegra2 SoC support
Signed-off-by: Tom Warren <twarren@nvidia.com>
2011-02-21 08:30:54 +01:00
Michal Simek
518075fc6a microblaze: Fix msr handling in interrupt_handler
Fix ancient code which worked with MSR in a bad way.
Use rtid instruction which enable IRQs and jump.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-02-15 15:13:24 +01:00
Michal Simek
b777a37c29 microblaze: Fix systems with MSR=0
u-boot BSP generates XILINX_USE_MSR_INSTR macro
even for system with MSR=0. That's why explicitly
check that MSR=1.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-02-15 15:13:24 +01:00
Graeme Russ
6002bf03b4 sc520: Release CAR and enable caching 2011-02-12 15:12:12 +11:00
Graeme Russ
e4f78d78d7 x86: Convert board_init_f to use an init_sequence 2011-02-12 15:12:10 +11:00
Graeme Russ
a3824142e7 x86: Rearrange function calls in board_init_f 2011-02-12 15:12:08 +11:00
Graeme Russ
71a5404974 x86: Split board_init_f() into init_fnc_t compatible functions 2011-02-12 15:12:06 +11:00
Graeme Russ
5fed82110d x86: Fix incorrect usage of relocation offset
x86 has always used relocation offset in the opposite sense to the ELF
standard - Fix this
2011-02-12 15:12:05 +11:00
Graeme Russ
0b2378557c x86: Move console initialisation into board_init_f 2011-02-12 15:12:03 +11:00
Graeme Russ
bf6af154a4 x86: Move test for cold boot into init functions 2011-02-12 15:12:01 +11:00
Graeme Russ
c869e2ac46 x86: Move call to dram_init_f into board_init_f 2011-02-12 15:11:59 +11:00
Graeme Russ
fb0029088e x86: Defer setup of final stack 2011-02-12 15:11:58 +11:00
Graeme Russ
96cd66426a sc520: Move RAM sizing code from asm to C 2011-02-12 15:11:54 +11:00
Graeme Russ
ed4cba79d6 x86: Use Cache-As-RAM for initial stack 2011-02-12 15:11:52 +11:00
Graeme Russ
2e2613d2c4 x86: Move initial gd to fixed location 2011-02-12 15:11:50 +11:00
Graeme Russ
6d0cb34954 sc520: Remove printf calls from cpu_init_f
In later patches, cpu_init_f will be called before console has been
initialised and printf will not be legitimately available
2011-02-12 15:11:40 +11:00
Graeme Russ
870847f5c5 sc520: Move board specific settings to board init function 2011-02-12 15:11:38 +11:00
Graeme Russ
c2cbbaf0b4 sc520: Define MMCR address in include file 2011-02-12 15:11:36 +11:00
Graeme Russ
0ea76e92e9 x86: Make cpu init functions weak 2011-02-12 15:11:35 +11:00
Graeme Russ
4e33467d44 x86: Call early_board_init when warm booting
early_board_init has been skipped to avoid SDRAM corruption in the case
that a fully relocatable image has been loaded into SDRAM and is being
executed from SDRAM. x86 is being aligned with other architectures (ARM
and PPC in particlar) and will be using Cache-As-RAM to run a C
environment from Flash (or SRAM if you have some). early_board_init may
be needed to assist in the setup of Cache-As-RAM and the early C
environment
2011-02-12 15:11:33 +11:00
Graeme Russ
0c24c9cc71 x86: Add processor flags header from linux 2011-02-12 15:11:32 +11:00
Graeme Russ
c53fd2bb6d x86: Move Global Descriptor Table defines to processor.h 2011-02-12 15:11:30 +11:00
Graeme Russ
ca56a4ceec x86: Add stack dump to register dump 2011-02-12 15:11:28 +11:00
Graeme Russ
9963a8216e x86: Fix mangled umlauts
git mergetool has a nasty habit of mangling umlats - fix ones that have
been missed in previous submissions
2011-02-12 15:11:26 +11:00
Graeme Russ
0640e40272 sc520: Sort Makefile 2011-02-12 15:11:25 +11:00
Graeme Russ
3a25e94410 x86: Parametize values used in linker script 2011-02-12 15:11:24 +11:00
Graeme Russ
a85f53cd3f x86: Align config.mk and linker scripts with other arches 2011-02-12 15:11:21 +11:00
Graeme Russ
de47cbe686 x86: Fix definition of global_data struct for asm-offsets.c 2011-02-12 15:11:21 +11:00
York Sun
856e4b0d7f powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3
When DDR data rate is higher than 1200MT/s or controller interleaving is
enabled, additional cycle for write-to-read turnaround is needed to satisfy
dynamic ODT timing.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-10 23:40:02 -06:00
Wolfgang Denk
65b57ebb30 Merge branch 'next' of git://git.denx.de/u-boot-nios 2011-02-09 20:54:53 +01:00
Wolfgang Denk
fced09ae38 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2011-02-09 20:50:26 +01:00
Thomas Chou
d8a593c68b nios2: add gpio_is_valid
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Thomas Chou
85debefaf2 nios2: use long for ssize_t
This is consistent with nios2-linux. And resolved the warning,

cmd_nvedit.c: In function `do_env_export':
cmd_nvedit.c:660: warning: size_t format, ssize_t arg (arg 3)

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Thomas Chou
e91d54535f nios2: add gpio_free
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2011-02-08 08:29:53 -05:00
Dirk Eibach
2da0fc0d0f ppc4xx: Add DLVision-10G board support
Board support for the Guntermann & Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-02-07 11:13:16 +01:00
Wolfgang Denk
8d4addc3c3 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2011-02-06 22:41:53 +01:00
Wolfgang Denk
e9e481f74b Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2011-02-06 22:28:34 +01:00
Joakim Tjernlund
26e5f794d3 mpc83xx: Use correct register to calculate clocks.
Use SPMR instead of HRCWL when calculating clocks as HCRWL
may be changed and the CPU will not pick up all changes
until there is a POR. u-boot will think SPMF has changed and get
the clocks wrong.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-02-05 17:06:57 -06:00
Leo Liu
10fa8d7c70 mpc83xx: fix pcie configuration space read/write
This patch fix a problem for the pcie enumeration when the mpc83xx
pcie controller is connected with switch or we use both of the two
pcie controller.

Signed-off-by: Leo Liu <liucai.lfn@gmail.com>

fix codingstyle and compiler warning: 'pcie_priv' defined but not used

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-02-05 17:01:52 -06:00
Kumar Gala
04a641df25 powerpc/8xxx: Fix possible compile issue related to P1013
The P1013 is a single core version of P1022 and thus should use the
p1022_serdes.c code.  It was acciently pointing to p1013_serdes.c which
doesn't exist.

Reported-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-04 14:04:21 -06:00
Wolfgang Denk
4bfa18fb99 Merge branch 'master' of git://git.denx.de/u-boot-sh 2011-02-04 20:38:27 +01:00
York Sun
91671913f7 powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata:
DDR111 - MCKE signal may not function correctly at assertion of HRESET
DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can
         calibrate to incorrect values

These two workarounds must be implemented together because they touch
common registers.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
eb0aff77c8 powerpc/85xx: Rename MPC8572 DDR erratum to DDR115
Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:13 -06:00
York Sun
e1df0de493 powerpc/85xx: Remove unnecessary polling loop from DDR init
This polling loop is not required normally, unless specifically stated in
workaround.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:12 -06:00
Kumar Gala
5103a03a0b fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-02-03 02:46:12 -06:00