Commit graph

40569 commits

Author SHA1 Message Date
Vagrant Cascadian
82bd2f29ea Fix spelling of "occur".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-31 10:13:16 -04:00
Vagrant Cascadian
1381901e9a Fix spelling of "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-31 10:13:16 -04:00
Adam Ford
0fc4aad404 omap3logic: Fix Auto detect Logic PD Models
The autodetect feature doesn't allow users to specify the device tree.
This fix will make it only autodetect if 'fdtimage' is not defined.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:13:16 -04:00
Adam Ford
760d1afdcc OMAP3: omap3_logic: Add scripts to boot over network.
Not all networks have a DHCP server configured properly, so these
scripts make it easier to boot in that scenario.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:13:15 -04:00
Adam Ford
247dbda838 OMAP3: omap3_logic: Remove LCD preboot info
The LCD isn't supported in U-Boot and the LCD is now configured in
the device tree, so this code is pointless.

V2: Eliminiate erroneous newline.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:13:15 -04:00
Nishanth Menon
7774e97aa7 ti: common: board_detect: Return a valid empty string for un-initialized eeprom
Current logic for query of revision, board_name, config returns
NULL. Users of these functions do a direct strncmp to compare.
Unfortunately, as per conventions require two valid strings to compare
against and the current implementation causes a crash when compared
with NULL.

We'd still like to maintain the simplistic usage of these APIs instead
of redundant if (string) res=strncmp(fn(),"cmp",n); flowing all over
the place.

Hence, since the version, name and config is already pre-initialized
with empty string, just dont check for invalid header in the first
place and return the empty string to the caller.

Reported-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Correct was'nt -> wasn't typo]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:12:21 -04:00
Nishanth Menon
2a78c9e719 ti: common: board_detect: Setup initial default value for config as well
config should have been initialized along with others as defaults.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:04:21 -04:00
Nishanth Menon
28d624be62 ti: common: board_detect: Replace hardcoded value with macro
We should have used TI_DEAD_EEPROM_MAGIC in the first place.

Fixes: d3b98a9eb9 ("ti: common: dra7: Add standard access for board description EEPROM")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-31 10:04:21 -04:00
Alexander von Gernler
edb42dbacc cosmetic: Fix indentation in README
Signed-off-by: Alexander von Gernler <grunk@pestilenz.org>
2016-10-31 10:04:17 -04:00
Kever Yang
4594ac0784 rk3288: kconfig: remove duplicate definition of SPL_MMC_SUPPORT
SPL_MMC_SUPPORT defined in rockchip top level Kconfig instead of
inside rk3288 and default to disable if ROCKCHIP_SPL_BACK_TO_BROM
defined.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-30 13:29:06 -06:00
Jacob Chen
3f3e1e3395 rockchip: doc: add GPT partition layout
A simple introduction.

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-30 13:29:06 -06:00
Jacob Chen
7f35bbb949 rockchip: use rockchip linux partitions layout
Unify the partitions of each chip then it will be more easy for us to
write scripts, tools or guides for rockchip chips.

Those extra partitions mostly are used to be compatible with our
internal loaders (such as miniloader which was same as spl,  or
android loader then we can support dual boot)

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Kever Yang
612a2a0af4 dts: rk3288: remove node in dmc which not need anymore
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2016-10-30 13:29:06 -06:00
Kever Yang
7d6c78f573 rk3288: sdram: auto-detect the capacity
Add support for rk3288 dram capacity auto detect, support DDR3 and
LPDDR3, DDR2 is not supported.
The program will automatically detect:
- channel number
- rank number
- column address number
- row address number

The dts file do not need to describe those info after apply this patch.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2016-10-30 13:29:06 -06:00
Kever Yang
cd2f6b8b95 rk3288: config change for enable dram capacity auto-detect.
Enable ROCKCHIP_SPL_BACK_TO_BROM and disable CONFIG_SPL_MMC_SUPPORT
to save memory in order to enable add source code for dram capacity
auto-detect.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Kever Yang
0717dde057 evb-rk3399: config: set emmc as default boot dev
rk3399 has two mmc dev controller:
mmc 0: SD card;
mmc 1: EMMC

U-Boot will scan the mmc boot device configured by CONFIG_SYS_MMC_ENV_DEV,
since evb has emmc on board, let's set the EMMC as default.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Kever Yang
1b64a05072 rk3288: fix reg address for GRF_SOC_CON2
The GRF base address is missing, fix it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Kever Yang
27b95d25c5 rk3399: disable the clock multiplier support when SoC init
The Clock Multiplier in rk3399 EMMC programmable clock generator
is broken, we can remove its support from SoC GRF register.

Without this patch, rk3399 emmc driver is not work after below patch
applied:
6dffdbc mmc: sdhci: Add the programmable clock mode support

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
5564ed5dd9 rockchip: rk3288: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
c8a6bc9683 rockchip: rk3399: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Simon Glass
92ac73e4c2 rockchip: rk3036: Move rockchip_get_cru() out of the driver
This function is called from outside the driver. It should be placed into
common SoC code. Move it.

Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2016-10-30 13:29:06 -06:00
Jacob Chen
8dfb4a28f5 clk: rk3399: fix rockchip_get_cru
clk_rk3399 is driver name, not device name

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-10-30 13:29:06 -06:00
Sandy Patterson
60169826b7 rockchip: RK3288 needs fdt and initrd below 256M now
I am not sure why this limit is changing. But my kernel
doesn't load when it's above 256. This was testing on the
rock2 board.

Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Updated commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-10-30 13:29:05 -06:00
Tom Rini
48d2fc47c9 Merge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxi 2016-10-30 08:12:00 -04:00
Tom Rini
7ce79599a1 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-10-30 08:11:50 -04:00
Chen-Yu Tsai
fda9d5d327 sunxi: Add support for Cubieboard4
The Cubieboard4 is an A80 SoC based development board from Cubietech.

This board has a UART port, 4 USB host ports, a USB 3.0 OTG connector,
HDMI and VGA outputs, a micro SD slot, 8G eMMC flash, 2G DRAM, a WiFi/BT
combo chip, headphone and microphone jacks, IR receiver, and GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:05 +01:00
Stefan Brüns
fed329aebe tools: add mksunxiboot to tools-all target
mksunxiboot is useful outside of u-boot, it is e.g. used by sunxi-tools.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Chen-Yu Tsai
3e057e48b5 sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.

This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
 instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Amit Singh Tomar
9d6c9d988f sunxi: A64: enable USB support
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Chen-Yu Tsai
58b628ed87 sunxi: Add default zq value for sun9i (A80)
Both the A80 Optimus board and the Cubieboard 4 use a zq value of
4145117, or 0x3f3fdd.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Stefan Mavrodiev
06de070130 sunxi: Update DRAM clock for Olimex A20 boards
Originally dram clock was set to 480MHz, but this behaves
unstable. To improve stability the clock is reduced to 384MHz

Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Chen-Yu Tsai
31633a5677 sunxi: Add support for SID e-fuses on sun9i
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Andre Przywara
6301e80ccf sunxi: dts: Pine64: add Ethernet alias
The sun8i-emac driver works fine with the A64 Ethernet IP, but we are
missing an alias entry to trigger the driver instantiation by U-Boot.
Add the line to point U-Boot to the Ethernet DT node.
This enables TFTP boot on the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Chen-Yu Tsai
c53344ad9c sunxi: Set default CPU clock rate to 1008 MHz for sun9i (A80)
In Allwinner's SDK the A80 is clocked to 1008 MHz by default.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Masahiro Yamada
6ab224da57 sunxi: remove unneeded CONFIG_USB_MAX_CONTROLLER_COUNT defines
ARCH_SUNXI selects DM_USB, where CONFIG_USB_MAX_CONTROLLER_COUNT
is not used.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
3ebb4567d6 sunxi: add MMC pinmux setup for SDC2 on sun9i
The A80 can support 8-bit eMMC with reset on the PC pingroups.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Jagan Teki
aec9a0f19f sunxi: Rename CONFIG_SUNXI to CONFIG_ARCH_SUNXI
CONFIG_SUNXI -> CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt

Cc: Simon Glass <sjg@chromium.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
a98c296a0e sunxi: enable SPL for sun9i
Now that DRAM initialization and clock setup is supported,
we can enable SPL for the A80.

[wens@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
7962a8d5a4 sunxi: add initial clock setup for sun9i for SPL
This is a cleaned up version set_pll() from Allwinner's boot0 source
(bootloader/basic_loader/bsp/bsp_for_a80/common/common.c).

[wens@csie.org: Added commit message; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
f28bad13b4 sunxi: Enable SMP mode for the boot CPU on sun9i (A80)
Since the A80 has many cores which we intend to use in SMP fashion,
we should set the SMP bit for the boot CPU.

[wens@csie.org: Added commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
ea1af9f26b sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from Allwinner's boot0 for now, even though
this may not be optimal for all applications (e.g. headless
systems might want to give priority to IO modules).

Adding a common callout to gtbus_init() from the SPL clock init
with a weakly defined implementation in sunxi/clock.c to fallback
to for platforms that don't require this.

[wens@csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Philipp Tomsich
297bb9e0fc sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.

With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.

[wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks]
[hdegoede@redhat.com: Fix checkpatch warnings]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-10-30 11:38:04 +01:00
Tom Rini
4ddc981225 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2016-10-29 17:16:00 -04:00
Tom Rini
30aaa774df Merge branch 'master' of git://git.denx.de/u-boot-usb 2016-10-29 17:15:37 -04:00
Tom Rini
9f375f655f Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-10-29 17:15:24 -04:00
Andre Przywara
57faca19a8 drivers: USB: OHCI: allow compilation for 64-bit targets
OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-10-29 19:45:40 +02:00
Tom Rini
4d6afd69ba configs/chromebox_panther_defconfig: Re-enable CONFIG_DM_PCI
This was turned off by accident, re-enble.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-10-29 09:00:01 -04:00
Jagan Teki
16185a85d9 MAINTAINERS: Update Jagan's email
Signed-off-by: Jagan Teki <jagan@openedev.com>
2016-10-29 09:00:01 -04:00
Stephen Warren
1fcf0ee9f1 travis-ci: build Tegra boards
ARMv7 Tegra boards aren't currently covered by any other travis-ci jobs.
Add a new job to build them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-29 09:00:00 -04:00
Stephen Warren
8304f05388 travis-ci: compile with buildman when running test/py
Use buildman to compile any U-Boot binary tested by test/py. This
re-uses all the work done elsewhere to make buildman work within
Travis-CI, in particular related to toolchain downloading and buildman
config file creation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2016-10-29 08:59:34 -04:00