CONFIG_SYS_GENERIC_BOARD should now be enabled for generic
functionality Further information in doc/README.generic-board
Signed-off-by: Nishanth Menon <nm@ti.com>
Ethernet driver configures the CPSW, SGMI and Phy and uses
the the Navigator APIs. The driver supports 4 Ethernet ports and
can work with only one port at a time.
Port configurations are defined in board.c.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
currently only spi0 is enabled on k2hk evm. This
configuration update is needed to enable spi1 and spi2.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
k2hk EVM is based on Texas Instruments Keystone2 Hawking/Kepler
SoC. Keystone2 SoC has ARM v7 Cortex-A15 MPCore processor. Please
refer the ti/k2hk_evm/README for details on the board, build and other
information.
This patch add support for keystone architecture and k2hk evm.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
- add davinci driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
This patch add support for gpimage format as a preparatory
patch for porting u-boot for keystone2 devices and is
based on omapimage format. It re-uses gph header to store the
size and loadaddr as done in omapimage.c
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
The keystone2 SOC requires to fix all 32 bit aliased addresses
to their 36 physical format. This has to happen after all fdt
nodes are added or modified.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Convert to using the common config files. This requires a little more
flexibility in the common files than we had been using before.
Signed-off-by: Tom Rini <trini@ti.com>
We previously only supported QSPI_1 (single) support. Add QSPI_4 (quad)
read support as well. This means we can be given one of two boot device
values, but don't care which it is, so perform a fixup on the QSPI_4
value. We add a qspiboot build target to better show how you would use
QSPI as a boot device in deployment. When we boot from QSPI, we can
check the environment for 'boot_os' to control Falcon Mode.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
This is only useful with the _spiboot build target anyhow, so only
include it then. Drop CONFIG_SPL_OS_BOOT support then as the flash is
small and didn't include a spot for the device tree already.
Signed-off-by: Tom Rini <trini@ti.com>
In general, we want to load the DT at base+128MB, so that we ahve
sufficient room for the kernel and a larger device tree. In the case of
OMAP3, use 64MB instead as we have a number of boards with 128MB DDR.
Signed-off-by: Tom Rini <trini@ti.com>
To deal with a reoccurring problem properly we need to specify addresses
for the Linux kernel, Flatted Device Tree and ramdisk that obey the
constraints within the kernel's Documentation/arm/Booting file but also
make sure that we relocate things within a valid address range.
It is possible with these addresses to also set fdt_high and initrd_high
to the value of 0xffffffff. We don't do this by default to allow for
the most likely success of people using custom addresses however.
Signed-off-by: Tom Rini <trini@ti.com>
This mainly converts the am335x_spl_bch driver to the "normal" format
which means a slight change to nand_info within the driver.
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
Commit d016dc42ce changed the layout of BCH8 SW
on omap3 boards. We need to adopt the ecc layout for the nand_spl_simle
driver to avoid wrong ecc errors.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Cc: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch add gicv3 support to uboot armv8 platform.
Changes for v2:
- rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
- move smp_kick_all_cpus() from gic.S to start.S, it would be
implementation dependent.
- Each core initialize it's own ReDistributor instead of master
initializeing all ReDistributors. This is advised by arnab.basu
<arnab.basu@freescale.com>.
Signed-off-by: David Feng <fenghua@phytium.com.cn>
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
This change enables automatically uuid generation by command gpt.
In case of updating partitions layout user don't need to care about
generate uuid manually.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com
Those commands basis on implementation of random UUID generator version 4
which is described in RFC4122. The same algorithm is used for generation
both ids but string representation is different as below.
char: 0 9 14 19 24 36
xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
UUID: be be be be be
GUID: le le le be be
Commands usage:
- uuid [<varname>]
- guid [<varname>]
The result is saved in environment as a "varname" variable if argument is given,
if not then it is printed.
New config:
- CONFIG_CMD_UUID
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com
This patch adds support to generate UUID (Universally Unique Identifier)
in version 4 based on RFC4122, which is randomly.
Source: https://www.ietf.org/rfc/rfc4122.txt
Changes:
- new configs:
- CONFIG_LIB_UUID for compile lib/uuid.c
- CONFIG_RANDOM_UUID for functions gen_rand_uuid() and gen_rand_uuid_str()
- add configs dependency to include/config_fallbacks.h for lib uuid.
lib/uuid.c:
- add gen_rand_uuid() - this function writes 16 bytes len binary representation
of UUID v4 to the memory at given address.
- add gen_rand_uuid_str() - this function writes 37 bytes len hexadecimal
ASCII string representation of UUID v4 to the memory at given address.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
[trini: Add CONFIG_EFI_PARTITION to fallbacks]
Signed-off-by: Tom Rini <trini@ti.com>
Changes in lib/uuid.c to:
- uuid_str_to_bin()
- uuid_bin_to_str()
New parameter is added to specify input/output string format in listed functions
This change allows easy recognize which UUID type is or should be stored in given
string array. Binary data of UUID and GUID is always stored in big endian, only
string representations are different as follows.
String byte: 0 36
String char: xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
string UUID: be be be be be
string GUID: le le le be be
This patch also updates functions calls and declarations in a whole code.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com
This commit introduces cleanup for uuid library.
Changes:
- move uuid<->string conversion functions into lib/uuid.c so they can be
used by code outside part_efi.c.
- rename uuid_string() to uuid_bin_to_str() for consistency with existing
uuid_str_to_bin()
- add an error return code to uuid_str_to_bin()
- update existing code to the new library functions.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com
The u-boot's image TEXT_BASE needs to be changed to 0x43e00000 from 0x78100000.
This change provides compatibility with other trats2 (RD_PQ) devices
(http://download.tizen.org/releases/system/).
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work. Details on this being
required will be part of the eMMC datasheet. Also add using this
command to the dra7xx README.
* Whitespace fix by panto
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on M53EVK and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Fix memory access slowness on i.MX53 M53EVK board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On M53EVK,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.
The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:
0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)
This is past the DRAM available in the first bank on M53EVK, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.
There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on MX53QSB and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Fix memory access slowness on i.MX53 MX53QSB board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On MX53QSB,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.
The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:
0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)
This is past the DRAM available in the first bank on MX53QSB, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.
There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Liu Ying <Ying.Liu@freescale.com>
Use of PCIe on SABRE Lite and Nitrogen6x boards
is atypical and requires the use of custom daughter
boards.
Use in U-Boot is even rarer, so this patch removes it from
the standard configuration.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
CONFIG_BOOT_INTERNAL is not used anywhere, so let's remove it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
making it into a big pile of #ifdef . This driver implements the regular fuse
command interface, but due to the IP blocks' limitation, we support only READ
and PROG functions.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed in front of the U-Boot binary. This is necessary, since
both the U-Boot and the IVT must be contained in single CST signature. To
make things worse, the IVT must be concatenated with one more entry at it's
end, that is the length of the entire CST signature, IVT and U-Boot binary
in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can
easily align them all and then produce the length field as needed.
As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus
we place the IVT at 0x8000 offset, CST right past IVT and claim the size
is correct. The HAB library accepts this setup.
Finally, to make sure the vectoring in SPL still works even after moving
the SPL from 0x0 to 0x1000, we add a small function which copies the
vectoring code and tables to 0x0. This is fine, since the vectoring code
is position independent.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
In the recent mmc cleanup, the mmc_host_is_spi macro was broken and
bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of
which were incorrect.
Signed-off-by: Tom Rini <trini@ti.com>
On the boards this target supports this option is either non possible
without hardware mods (Beaglebone White/Black) or not supported due to
board design. Drop this and regain some space.
Signed-off-by: Tom Rini <trini@ti.com>
This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
cc: Piotr Wilczek <p.wilczek@samsung.com>
cc: Minkyu Kang <mk7.kang@samsung.com>
New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand
Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile
CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library
(declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Tom Rini <trini@ti.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
