Commit graph

52355 commits

Author SHA1 Message Date
maxims@google.com
413353b30b aspeed: Make SCU lock/unlock functions part of SCU API
Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:31 -04:00
maxims@google.com
1eb0a464b7 aspeed: Watchdog Timer Driver
This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:31 -04:00
maxims@google.com
0753bc2d30 dm: Simple Watchdog uclass
This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:30 -04:00
maxims@google.com
17c5fb1953 aspeed: Update ast2500 Device Tree
Pull in the Device Tree for ast2500 from the mainline Linux kernel.
The file is copied from
https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi

Signed-off-by: Maxim Sloyko <maxims@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:30 -04:00
Vikas Manocha
f22f3dc996 ARM: DT: STM32F746: add u-boot, dm-pre-reloc property to sub nodes
This patch is required for correct SPL device tree creation by fdtgrep
as fdtgrep looks for u-boot,dm-pre-reloc property of the node to include
it in the spl device tree.

Not adding it in these subnodes ignores the pin muxing of peripherals
which is almost always in the subnodes.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:57:30 -04:00
Chris Packham
d7f53065d9 README: remove CONFIG_CMD_DATE
CONFIG_CMD_DATE was recently moved to Kconfig. Remove the now duplicate
description of the option.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:29 -04:00
Chris Packham
f90df596a8 tools: moveconfig: cleanup README entires
The Kconfig description replaces the description in the README file so
as options are migrated they can be removed from the README.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:29 -04:00
Chris Packham
ca43834d66 tools: moveconfig: cleanup whitelist entries
After moving to KConfig and removing from all headers options should be
removed from config_whitelist.txt so the build starts complaining if
someone adds them back.

Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:29 -04:00
Chris Packham
85edfc1f6f tools: moveconfig: extract helper function for user confirmation
Avoid repetitive code dealing with asking the user for confirmation.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:28 -04:00
Chris Packham
d425d6056e rtc: Add DM support to ds1307
Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:28 -04:00
Pau Pajuelo
2e0c6f38f3 igep003x: Add netboot support
netboot allows to boot an external image using TFTP and NFS protocols

Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:27 -04:00
Pau Pajuelo
09533e5de7 igep003x: Add support for IGEP SMARC AM335x
The IGEP SMARC AM335x is an industrial processor module with
following highlights:

  o AM3352 TI processor (Up to AM3359)
  o Cortex-A8 ARM CPU
  o SMARC form factor module
  o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
  o WiFi a/b/g/n and Bluetooth v4.0 on-board
  o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
  o JTAG debug connector available
  o Designed for industrial range purposes

Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:27 -04:00
Ladislav Michl
3607e0f86f igep003x: UBIize
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:27 -04:00
Ladislav Michl
a96c08f509 igep0033: Rename to igep003x
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:26 -04:00
Ladislav Michl
18cae43b62 mtd: nand: Consolidate nand spl loaders implementation
nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:26 -04:00
Ladislav Michl
bf86392251 ARM: am33xx: define BOOT_DEVICE_ONENAND
am33xx does not support OneNAND, but we need this define anyway
to let UBI SPL code compile.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:25 -04:00
Ladislav Michl
df9f07fa3d ARM: am33xx: fix typo in spl.h
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
2017-05-08 11:57:25 -04:00
Vikas Manocha
fddd70ef37 stm32f7: remove not needed configuration from board config
This patch removes:
	- CONFIG_CMD_MEM: enabled by default
	- CONFIG_DESIGNWARE_ETH : not being used anywhere.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:25 -04:00
Vikas Manocha
97c2093236 stm32f7: add support for stm32f769 disco board
This board support stm32f7 family device stm32f769-I with 2MB internal Flash &
512KB RAM.
STM32F769 lines offer the performance of the Cortex-M7 core (with double
precision floating point unit) running up to 216 MHz.

To compile for stm32f769 board, use same defconfig as stm32f746-disco,
the only difference is to pass "DEVICE_TREE=stm32f769-disco".

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:24 -04:00
Vikas Manocha
bd4a985f50 stm32f7: move board specific pin muxing to dts
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:24 -04:00
Vikas Manocha
58fb3c8d89 stm32f7: increase the max no of pin configuration to 70
The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:23 -04:00
Vikas Manocha
bfea69ad27 stm32f7: sdram: correct sdram configuration as per micron sdram
Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.

Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:22 -04:00
Vikas Manocha
a241c241cf stm32f7: enable board info read from device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:22 -04:00
Vikas Manocha
57af3cc32a stm32f7: stm32f746-disco: read memory info from device tree
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:21 -04:00
Vikas Manocha
2f80a9f72e stm32f746: to switch on user LED1 & read user button
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:21 -04:00
Vikas Manocha
280057bd7d stm32f7: use stm32f7 gpio driver supporting driver model
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.

Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-08 11:57:21 -04:00
Vikas Manocha
d33a6a2f06 ARM: DT: stm32f7: add gpio device tree nodes
Also created alias for gpios for stm32f7 discovery board. Based on these
aliases, it would be possible to get gpio devices by sequence.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:57:20 -04:00
Vikas Manocha
774171020b dm: gpio: Add driver for stm32f7 gpio controller
This patch adds gpio driver supporting driver model for stm32f7 gpio.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Christophe KERELLO <christophe.kerello@st.com>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:57:02 -04:00
Vikas Manocha
6c9a10034a stm32f7: sdram: use sdram device tree node to configure sdram controller
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:05 -04:00
Vikas Manocha
d0b24c1aa9 stm32f7: use clock driver to enable sdram controller clock
This patch also removes the sdram/fmc clock enable from board specific
code.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:04 -04:00
Vikas Manocha
2d9c33ca3f stm32f7: use driver model for sdram initialization
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:04 -04:00
Vikas Manocha
fd198ee1a8 ARM: DT: stm32f7: add sdram pin contol node
Also added DT binding doc for stm32 fmc(flexible memory controller).

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:03 -04:00
Vikas Manocha
910a52ede3 stm32f7: dm: add driver model support for sdram
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:02 -04:00
Vikas Manocha
bf1ae4426b stm32f7: sdram: move sdram driver code to ram drivers area
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:39:02 -04:00
Vikas Manocha
890bafd752 stm32f7: use clock driver to enable qspi controller clock
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
2017-05-08 11:38:41 -04:00
Vikas Manocha
5bf5250e9d spl: make image arg or fdt blob address reconfigurable
At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2017-05-08 11:38:40 -04:00
Uri Mashiach
dc07961f5e arm: am57xx: cl-som-am57x: enable USB commands
Add CONFIG_CMD_USB to the defconfig file.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:38:39 -04:00
Uri Mashiach
d9eb26eb15 arm: am57xx: cl-som-am57x: enable USB storage
Add CONFIG_USB_STORAGE to the defconfig file.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:38:39 -04:00
Uri Mashiach
e627290ac6 arm: am57xx: cl-som-am57x: fix USB scan
USB bus scan attempt:
----------------------------------cut----------------------------------
=> usb start
starting USB...
USB0:   Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... data abort
pc : [<fff6240e>]          lr : [<fff623b3>]
reloc pc : [<8081b40e>]    lr : [<8081b3b3>]
sp : fdf42930  ip : fdf42960     fp : 00000000
r10: 00000001  r9 : fdf42ef0     r8 : 48890020
r7 : 00000002  r6 : fffa5840     r5 : fff8b140  r4 : fdf429c0
r3 : 00000000  r2 : 00000004     r1 : 00000000  r0 : 00000000
Flags: nZcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...
----------------------------------cut----------------------------------

Fix by enabling USB configuration in the SPL.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Grinberg <grinberg@compulab.co.il>
2017-05-08 11:38:38 -04:00
Uri Mashiach
4acfe1ae46 arm: am57xx: cl-som-am57x: invoke clock API to enable/disable clocks
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.

Modifications:
* Enable USB clocks in the OMAP version of the function
  board_usb_init.
* Disable USB clocks in the OMAP version of the function
  board_usb_cleanup.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:38:38 -04:00
Uri Mashiach
1a9a5f7a39 usb: host: xhci-omap: fix double weak board_usb_init functions
A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c

To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
  normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
  the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
  omap_xhci_board_usb_init.
  Done only for boards that defines CONFIG_USB_XHCI_OMAP.

To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
  board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
  to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
  omap_xhci_board_usb_cleanup.
  Done only for boards that defines CONFIG_USB_XHCI_OMAP.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
2017-05-08 11:38:37 -04:00
Uri Mashiach
ef3f3b8100 arm: usb: dra7xx: xHCI registers based on USB port index
Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2017-05-08 11:38:36 -04:00
Uri Mashiach
67566ab66b arm: dra7xx: move CONFIG_DRA7XX to Kconfig
The symbol CONFIG_DRA7XX is needed for Kconfig conditions.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-05-08 11:38:35 -04:00
Tom Rini
64c4ffa9fa Prepare v2017.05
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-05-08 10:11:08 -04:00
xypron.glpk@gmx.de
169b50efe2 board/BuR/common: incorrect check of dtb
The logical expression to check the dtb is incorrect in
load_devicetree.

The problem was indicated by cppcheck.

The inconsistent variable name dtppart is changed to dtbpart.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
2017-05-05 16:46:51 -04:00
xypron.glpk@gmx.de
f59a3b21f6 tools: sunxi: avoid read after end of string
The evaluation of option -c is incorrect:

According to the C99 standard endptr in the first strtol is always
set as &endptr is not NULL.
So the first part of the or condition is always true.
If all digits in optarg are valid endptr will point to the closing \0
and the second strtol will read beyond the end of the string optarg
points to.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2017-05-05 16:45:57 -04:00
xypron.glpk@gmx.de
d27e35f256 relocate-rela: add missing va_end()
va_start must always be matched by va_end.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05 16:45:57 -04:00
xypron.glpk@gmx.de
05d887b461 lib: circbuf: avoid possible null pointer dereference
We should not first dereference p and afterwards assert that is
was not NULL. Instead do the assert first.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05 16:45:57 -04:00
xypron.glpk@gmx.de
1275a44e2f arm64: mvebu: incorrect check of fdt address cells
In dram_init_banksize there seems to be a typo concerning
a plausibility check of the fdt.
Testing sc > 2 twice does not make any sense.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05 16:45:56 -04:00
xypron.glpk@gmx.de
cc93834dee meson: gxbb: increase CONFIG_SYS_BOOTM_LEN
A feature rich Linux kernel needs more than 8 MiB.
Hence enlarge CONFIG_SYS_BOOTM_LEN to 64 MiB for the GXBB systems.
As all known GXBB systems have at least 512 MiB of RAM this poses no problem.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2017-05-05 16:45:52 -04:00