Commit graph

52355 commits

Author SHA1 Message Date
Philipp Tomsich
a1c29d4b43 rockchip: mkimage: set init_boot_size to avoid confusing the boot ROM
This change restores the earlier setting of init_boot_size to include
the maximum area covered by the the boot ROM of each chip for resolve
issues with back-to-bootrom functionality reported by Kever and Heiko.

To ensure that we don't run into the same issue again in the future,
I have updated the comments accordingly and added a reference to the
mailing list archive (there's some very helpful info from Andy Yan
that provides background on the BootROM requirements regarding these
fields).

See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for
some background (by Andy Yan) of how the BootROM processes this field.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:23 -06:00
Philipp Tomsich
ad972ac3d9 rockchip: mkimage: force 2KB alignment for init_size
The Rockchip BootROM relies on init_size being aligned to 2KB
(see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).

This pads the image to 2KB both for SD card images and SPI images
and uses a common symbolic constant for the alignment.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Philipp Tomsich
2fb371ff64 rockchip: mkimage: add support for verify_header/print_header
The rockchip image generation was previously missing the ability to
verify the generated header (and dump the image-type) without having
to resort to hexdump or od. Experience in our testing has showed it
to be very easy to get the rkspi and rksd images mixed up and the
lab... so we add the necessary support to have dumpimage tell us
what image type we're dealing with.

This change set adds the verify_header and print_header capability
to the rksd/rkspi image drivers (through shared code in rkcommon).

As of now, we only support images fully that are not RC4-encoded for
the SPL payload (i.e. header1 and payload). For RC4-encoded payloads,
the outer header (header0) is checked, but no detection of whether
this is a SD/MMC or SPI formatted payload takes place.

The output of dumpsys now prints the image type (spl_hdr), whether it
is a SD/MMC or SPI image, and the (padded) size of the image:
  $ ./tools/dumpimage -l ./spl.img
  Image Type:   Rockchip RK33 (SD/MMC) boot image
                               ^^^^^^ SD/MMC vs. SPI indication
                         ^^^^ spl_hdr indicated by the image
  Data Size:    79872 bytes

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Kever Yang
37ffae7c5b rockchip: evb-rk3328: update board maintainer
Update maintainer to Kever Yang for William Zhang is not
work for this board now.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Kever Yang
ae0fc89e8f MAINTAINERS: rockchip: add board/rockchip as maintained entry
Directory board/rockchip/ are all boards for Rockchip SoCs,
so add it to maintained entry.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Kever Yang
4f3dc8806e MAINTAINERS: git-mailrc: update maintainer for Rockchip
Send patch to Kever Yang instead of Lin Huang for Rockchip patches,
for Lin is not always working on upstream U-Boot.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Changed , to : in subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Meng Dongyang
75ff918f83 rockchip: dts: rk3328: support and enable xhci
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:22 -06:00
Meng Dongyang
4f3a579e05 configs: rk3328: config xhci controller
Add config of max root ports and add config to enable xhci
controller.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Meng Dongyang
ef82a0db5a rockchip: dts: rk3328: add ehci and ohci node and enable host0 port
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Meng Dongyang
d16f514d8c configs: rk3328: add support for usb and config ehci and ohci driver
Add defconfig for usb and ehci and ohci controller, config maximal
number of ports of the root hub for ohci driver.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
077eb31514 rockchip: pinctrl: rk3328: do not set io routing
In rk3328, some function pin may have more than one choice, and muxed
with more than one IO, for example, the UART2 controller IO,
TX and RX, have 3 choice(setting in com_iomux):
- M0 which mux with GPIO1A0/GPIO1A1
- M1 which mux with GPIO2A0/GPIO2A1
- usb2phy which mux with USB2.0 DP/DM pin.

We should not decide which group to use in pinctrl driver,
for it may be different in different board, it should goes to board
file, and the pinctrl file should setting correct iomux depends on
the com_iomux value.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
6f0c123713 rockchip: pinctrl: move rk3328 grf reg definition in header file
Move GRF register bit definition into GRF header file, remove
'GRF_' prefix and add 'GPIOmXn_' as prefix for bit meaning.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
3c421f6fa9 rockchip: rk3036: clean mask definition for grf reg
U-Boot prefer to use MASKs with SHIFT embeded, clean the Macro
definition in grf header file and pinctrl driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:21 -06:00
Kever Yang
1960b01034 rockchip: clock: rk3036: some fix according TRM
- hclk/pclk_div range should use '<=' instead of '<'
- use GPLL for pd_bus clock source
- pd_bus HCLK/PCLK clock rate should not bigger than ACLK

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Kever Yang
37943aaeea rockchip: rk3036: clean mask definition for cru reg
Embeded the shift in mask MACRO definition in cru header file
and clock driver.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andy Yan
9d7ed33926 rockchip: rk3368: Add PX5 Evaluation board
PX5 EVB is designed by Rockchip for automotive field
with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS
HDMI video input/output interface, audio codec ES8396,
WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity
sensor STK3410.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andreas Färber
54c57ae051 rockchip: rk3368: Add initial support for RK3368 based GeekBox
The GeekBox is a TV box from GeekBuying, based on an MXM3 module.
The module can be used with base boards such as the GeekBox Landingship.
This adds basic support to chain-load U-Boot from Rockchip's miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andy Yan
e2901ab8f6 rockchip: rk3368: add Sheep board
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
2017-06-07 07:29:20 -06:00
Andy Yan
fe9d4e77ea rockchip: rk3368: Add sysreset driver
Add sysreset driver to reset rk3368 SOC.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:20 -06:00
Andreas Färber
37a0c60085 rockchip: rk3368: Add core start-up code for RK3368
The RK3368 is an octa-core Cortex-A53 SoC from Rockchip.
This adds basic support to chain-load U-Boot from Rockchip's
miniloader.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Andy Yan
27600a5837 rockchip: rk3368: Add pinctrl driver
Add driver to support iomux setup for the most commonly
used peripherals on rk3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Andy Yan
d1dcf8527e rockchip: rk3368: Add clock driver
Add driver to setup the various PLLs and peripheral
clocks on the RK3368.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Mark Kettenis
c40d48bbbc regulator: pwm: Fix handling of missing init voltage
Since priv->init_voltage is an unsigned integer it can never be
negative.  So the current code fails to detect a missing
'regulator-init-microvolt' property and instead misconfigures the
PWM device.  Fix this by making the relevant members of
'struct pwm_regulator_info' signed integers.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2017-06-07 07:29:19 -06:00
Heiko Stübner
d1bf69d822 power: rk808: fix ldo register offset
Till now get_ldo_reg did a return &rk808_ldo[num - 1]; to return
the ldo register offset but didn't take into account that its
calling functions already created the ldo as ldo = dev->driver_data - 1.

This resulted in the setting for ldo8 writing to the register of ldo7
and so on. So fix this and get the correct ldo register data.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Philipp Tomsich
f8e3b08377 rockchip: board: puma_rk3399: build FIT image via u-boot.itb
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Philipp Tomsich
1644f381ca rockchip: defconfig: puma-rk3399: enable RK3399 efuse driver
With everything in place (i.e. the new efuse driver, the clk-support
for the non-secure efuse block, and the board-specific functions to
derive 'serial#' from the cpu-id within the efuses), enable this in
the RK3399-Q7 defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:19 -06:00
Klaus Goger
8adc9d18a8 rockchip: board: puma_rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.

The MAC address is only generated and set if there is no ethaddr
present in the saved environment.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:18 -06:00
Philipp Tomsich
9415b9a7d8 rockchip: board: puma_rk3399: add support for serial# and cpuid# via efuses
With our efuse driver for the RK3399 ready, we can add the
board-specific code that consumes the cpuid from the efuse block and
postprocesses it into the system serial (using the same CRC32 based
derivation as in Linux).

We expose the cpuid via two distinct environment variables:
   serial# - the serial number, as derived in Linux
   cpuid#  - the raw 16 byte CPU id field from the fuse block

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:18 -06:00
Philipp Tomsich
49cd8e85eb rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07 07:29:17 -06:00
Kever Yang
7c1fb0a794 rockchip: rk8xx: allocate priv structure for driver
The rk8xx_priv structure need to allocate for driver, or else
it will cause data abort when CPU access it.

This is a bug fix for below patch set:
https://www.mail-archive.com/u-boot@lists.denx.de/msg247345.html

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 06:57:49 -06:00
Kever Yang
c4a921513a rockchip; rk3399: disable SRAM security region
Some host like SD and eMMC may use DMA to transter data to SRAM,
set memory to non-secure to make sure the address can be accessed.

The security of SRAM in OS suppose to initialized in ATF bl31, and
the SPL is before the bl31.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 06:57:49 -06:00
Heiko Stübner
91ff05275a defconfig: firefly-rk3399: fix pinctrl config option
The option is named PINCTRL_ROCKCHIP_RK3399 not ROCKCHIP_RK3399_PINCTRL.
Set the correct option.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
2017-06-07 06:57:49 -06:00
Tom Rini
24796d27be Merge git://git.denx.de/u-boot-ubi 2017-06-06 07:13:39 -04:00
Siva Durga Prasad Paladugu
34cc30af27 fs: usbifs: Fix warning in ubifs
This patch fixes the below warning by typecasting it properly
fs/ubifs/ubifs.c: In function 'ubifs_load':
fs/ubifs/ubifs.c:942:29: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
  err = ubifs_read(filename, (void *)addr, 0, size, &actread);

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-06-06 07:11:12 +02:00
Tom Rini
b9eaeae19e Merge git://git.denx.de/u-boot-usb 2017-06-05 21:05:51 -04:00
Tom Rini
ad701b1c91 Prepare v2017.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 20:40:22 -04:00
Phil Edworthy
71d2cf2359 armv7m: Fix larger builds
The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-06-05 14:13:14 -04:00
Phil Edworthy
111a6af97a arm: Add Kconfig symbols used for Linux asm compatibility
Rather than change asm files that come from Linux, add the symbols
to Kconfig. Since one of the symbols is for thumb2 builds, make
CPU_V7M always select them.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
2017-06-05 14:13:13 -04:00
Michal Simek
a83afb6b1f arm64: hikey: Fix instructions in readme
Fix inaccurate instructions in README.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-05 14:13:13 -04:00
Patrice Chotard
14a50e3736 drivers: ram: stm32: fix compilation issue
If CONFIG_CLK flag is not set, compilation raises the
following error message:

drivers/ram/stm32_sdram.c: In function 'stm32_fmc_probe':
drivers/ram/stm32_sdram.c:154:2: error: 'ret' undeclared (first use in this function)
  ret = stm32_sdram_init(dev);

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cc: Vikas Manocha <vikas.manocha@st.com>
2017-06-05 14:13:13 -04:00
Michal Simek
439edf6120 arm64: Add NOLOAD attribute NOLOAD to .bss sections
Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1: 64134f0112)

The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-06-05 14:13:12 -04:00
Michal Simek
3c85417f45 ARMv8: Add support for poweroff via PSCI
Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 14:13:12 -04:00
Tom Rini
18b2916585 cmd/ethsw: Disable implicit enum conversion warning
With clang-3.8 we see warnings like:
cmd/ethsw.c:304:6: warning: implicit conversion from
      enumeration type 'enum ethsw_keyword_opt_id' to different enumeration type
      'enum ethsw_keyword_id' [-Wenum-conversion]
                                        ethsw_id_pvid_no,
                                        ^~~~~~~~~~~~~~~~

Because we have one enum for ethsw_keyword_id and a second enum for
ethsw_keyword_opt_id.  This ends up being safe as ethsw_keyword_opt_id
explicitly starts after ethsw_keyword_id enum ends.   Disable the
warning here rather than collapse these into one enum and rely on
comments to denote where optional keywords begin.

Cc: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-06-05 14:13:12 -04:00
Pantelis Antoniou
4e33316f65 malloc: Turn on DEBUG when enabling unit tests
Unit tests require mallinfo which in turn requires DEBUG on
dlmalloc to be enabled.

The dependancy on CONFIG_SANDBOX is wrong.

Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:13:11 -04:00
Pantelis Antoniou
54cc4dcfda arm: Always keep the dtb section on objcopy
The dtb blob section must always be present in the resulting image.
Either if OF_EMBEDED is used or if unit tests include dtb blobs.

Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:13:11 -04:00
Keerthy
b12550eb9c board: ti: am571-idx: Add vcores support
Update vcores for am571-idk board.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-06-05 14:13:11 -04:00
Tom Rini
0f7faf03bf scripts/Makefile.lib: Only apply u-boot.dtsi files in the target directory
We only want to apply files such as 'omap5-u-boot.dtsi', which resides
in arch/arm/dts/ to other files in arch/arm/dts/ and not say
test/overlay/.  Rework the make logic to check for -u-boot.dtsi files in
the same directory as their target dts.

Cc: Simon Glass <sjg@chromium.org>
Reported-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:13:10 -04:00
Jean-Jacques Hiblot
7a53a1a811 ARM: ti: Update layout for MMC and eMMC (env and dfu)
The problems with the current DFU layout are:
MMC: The space allocated for u-boot is too small for the latest u-boot
     (>750KB). We need to increase it. eMMC uses a much bigger area (2MB).
eMMC: region "u-boot.img.raw" overlaps the environment area and the region
      "spl-os-image.raw".
both: region "spl-os-image.raw" is quite small and can't handle android
      kernels

Fixing this requires growing some regions and moving others.
Care has been taken to leave some room for further growth of
"spl-os-args.raw".
Also the "env" now appears in the dfu so that it's apparent that the
region is not free space that can be used to grow "u-boot.img.raw".
The MLO region is 0x100 sectors wide but the 0x100 are unused in case the
MLO comes too overflow this areas.
The total space allocated for those raw binaries is 16MB, of which 13+MB
are reserved for the kernel image.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2017-06-05 14:13:10 -04:00
Tom Rini
226498b8f8 common/spl/Kconfig: Use 'if SPL' / 'if TPL' guards
Much of the entries here simply depend on SPL (or TPL).  Instead of this
redundancy use if SPL / if TPL to guard the rest of the choices and only
show them when we have the relevant option enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-06-05 14:13:09 -04:00
Simon Glass
a132f77088 bootstage: Record time taken to set up the live device tree
This time is interesting as a comparision with the flat device tree time.
Add it to the record.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-06-05 14:13:09 -04:00