Commit graph

4 commits

Author SHA1 Message Date
Gabor Juhos
9950b90d38 MIPS: remove OUTPUT_FORMAT from linker scripts
The OUTPUT_FORMAT command in linker scripts
was always misused due to some endianess and
toolchain problems.

Use GCC flags to ensure proper output format,
and get rid of the OUTPUT_FORMAT commands in
the board specific u-boot.lds files.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
2013-01-30 23:34:10 +01:00
Daniel Schwierzeck
0efcdb15f9 MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefiles
Prepare for upcoming MIPS64 CPU support.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:47 +02:00
Daniel Schwierzeck
2c0e3de384 MIPS: factor out endianess flag handling to arch config.mk
This is CPU independent and should be configured architecture-wide.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2012-08-24 00:34:43 +02:00
Xiangfu Liu
80421fcc3e MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator.  Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.

JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.

On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application.  NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.

For more info about Ingenic XBurst Jz4740:
  http://en.ingenic.cn/eng/
  http://www.linux-mips.org/wiki/Ingenic

This patch introduces XBurst CPU support in U-Boot.  It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-10-10 22:06:12 +09:00