Commit graph

9870 commits

Author SHA1 Message Date
Tom Rini
a78cd86132 ARM: Rework and correct barrier definitions
As part of testing booting Linux kernels on Rockchip devices, it was
discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
some cases incomplete isb definitions.  This was causing a failure to
boot of the Linux kernel.

In order to solve this problem as well as cover any corner cases that we
may also have had a number of changes are made in order to consolidate
things.  First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
definitions.  This however introduces another complexity.  Due to
needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
form.  Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
a comment about it.  Now that we can always know what the target CPU is
capable off we can get always do the correct thing for the barrier.  The
final part of this is that need to be consistent everywhere and call
isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
function names in others.

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Sandy Patterson <apatterson@sightlogix.com>
Reported-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reported-by: Sandy Patterson <apatterson@sightlogix.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-08-05 07:23:57 -04:00
Alexey Brodkin
65fcba1251 arc: Rename AXS101 board to more generic AXS10x
As of now we have 2 flavors of ARC SDP boards:
 1) AXS101 - with ARC770 in ASIC
 2) AXS103 - with ARC HS38 in FPGA

Both options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.

While at it:
 * Recreated defconfigs with savedefconfig
 * In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-08-05 12:50:33 +03:00
Alexey Brodkin
cc8be222d1 arc: Rename ARCangel4 board to nSIM
ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.

But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.

Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi

And while at it:
 * Finally switch hex numerical values in nsim.h to defines from
   include/linux/sizes.h
 * Add defconfigs with ARC HS38 cores
 * Recreated all defconfigs with savedefconfig

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00
Alexey Brodkin
9bef24d0de arc: No need in sections defined in sources with newer tools
Starting from arc-2016.03 GNU tools linker properly works with
symbols defined in linker script and so external declarations
are no longer required, dump them.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00
Alexey Brodkin
699c4e592b arc: Update exception & interrupt handling for ARCv2
Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.

Now we update it with more ARCv2 specific vectors like
 * Software Interrupt
 * Division by zero
 * Data cache consistency error
 * Misaligned access

Also normal interrupts are now implemented properly and extened to
all possible 240 items.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00
Alexey Brodkin
ffffcd1594 arc: Add debug messages during relocation fixups
This might be useful to make sure relocation fixups really
happen. And since this info gets printed only in DEBUG
build it doesn't really hurt normal execution.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-08-05 12:50:25 +03:00
Tom Rini
ad6a303c57 Merge git://git.denx.de/u-boot-fsl-qoriq 2016-08-02 20:45:24 -04:00
Hou Zhiqiang
ab01ef5fa6 ARMv8/fsl-ppa: Consolidate PPA image stored-media flag for XIP
The PPA binary may be stored on QSPI flash instead of NOR.
So, deprecated CONFIG_SYS_LS_PPA_FW_IN_NOR in favour of
CONFIG_SYS_LS_PPA_FW_IN_XIP to prevent fragmentation of code
by addition of a new QSPI specific flag.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02 09:51:29 -07:00
Hou Zhiqiang
bded21895d arm/PSCI: Add support for creating ARMv7 PSCI version 1.0 DT node
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02 09:50:00 -07:00
Hou Zhiqiang
2c77416544 arm/PSCI: Fixed the backward compatiblity issue
Appended the compatible strings of old version PSCI to the latest
version supported. And there are some psci functions' property must
be added to DT only for psci version 0.1, including cpu_on, cpu_off,
cpu_suspend, migrate.

Note, ARMv8 Secure Firmware Framework doesn't support PSCI ver 0.1.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02 09:47:49 -07:00
Hou Zhiqiang
388aabc85d arm/PSCI: Removed unused code
Identify the PSCI node only by its name, so removed the code finding
it by compatible string.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-08-02 09:47:35 -07:00
York Sun
f3dbf1f0c9 powerpc/mpc85xx: Update erratum workaround for A006379
Update erratum workaround for A006379 to set register CPCHDBCR0
with value 0x001e0000, replacing the old value 0x003c0000.

Signed-off-by: York Sun <york.sun@nxp.com>
Reported-by: Dave Liu <dave.liu@nxp.com>
2016-08-02 09:43:13 -07:00
Tom Rini
7351bf2b5b Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2016-08-02 07:32:30 -04:00
Michal Simek
28559d4c93 ARM64: zynqmp: Do not enable DM_MMC by default
The patch:
"dm: mmc: zynq: Convert zynq to use driver model for MMC"
(sha1: 329a449f2c)
added dependency on enabling some MMC options by default.
There are minimal ZynqMP configurations which require
only minimal configurations to be enabled to keep u-boot size
as lower as possible.

Move options to defconfig instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-08-02 07:19:09 +02:00
Michal Simek
a9022b017a ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes
Serial driver is getting clk information via DT that's why
also clk node needs to have this flag.

Different behavior was introduced by:
"dm: Use dm_scan_fdt_dev() directly where possible"
(sha1: 911954859d)
where simple-bus driver starts to call dm_scan_fdt_dev() which has
additional logic around pre_reloc_only parameter which exclude
clk nodes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-08-01 08:35:02 +02:00
Michal Simek
e2f88dfd2d libfdt: Introduce new ARCH_FIXUP_FDT option
Add new Kconfig option to disable arch_fixup_fdt() calls for cases where
U-Boot shouldn't update memory setup in DTB file.
One example of usage of this option is to boot OS with different memory
setup than U-Boot use.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 19:37:08 -06:00
Tom Rini
26fb8db0f4 Merge git://git.denx.de/u-boot-rockchip 2016-07-31 20:31:13 -04:00
Hans de Goede
fcada3b05e sunxi: Re-enable h3 emac support
With the recent bug fixes for the sun8i_emac driver all known issues
are resolved, so we can re-enable the driver.

While at it, also enable the emac on the Orange Pi One.

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Jagan Teki <jteki@openedev.com>
2016-07-31 21:45:47 +02:00
jk.kernel@gmail.com
dd63fbc70a rockchip: add support for rk3288 PopMetal board
PopMetal is a rockchip rk3288 based board made by ChipSpark, which has
many interface such as HDMI, VGA, USB, micro-SD card, WiFi, Audio and
Gigabit Ethernet.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
d7ca67b7cd rockchip: add basic support for fennec-rk3288 board
Fennec is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
to display pins, I2C, SPI, UART and GPIOs.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
cba6bb1b74 rockchip: rk3288: move evb board to rockchip folder
The 'evb-rk3288' is not a vendor name, change it to 'rockchip' which is
the real vendor name.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
5051a77b2d Revert "rockchip: Move the MMC setup check earlier"
Boot Rom wouldn't initialize sdmmc while booting from eMMC. We need to
setup sdmmc gpio, otherwise we will hit an error below:

=>mmc info
blk_get_device: if_type=6, devnum=0: dwmmc@ff0c0000.blk, 6, 0
uclass_find_device_by_seq: 0 -1
uclass_find_device_by_seq: 0 0
   - -1 -1
   - -1 0
   - found
uclass_find_device_by_seq: 0 1
   - -1 -1
   - -1 0
   - not found
fdtdec_get_int_array: interrupts
get_prop_check_min_len: interrupts
Buswidth = 1, clock: 0
Buswidth = 1, clock: 400000
Sending CMD0
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy
dwmci_send_cmd: Timeout on data busy

This reverts commit 6efeeea79c.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
jk.kernel@gmail.com
8a632ac135 rockchip: add a dummy byte for the sdram-channel property
Add an extra byte so that this data is not byteswapped.

Signed-off-by: Ziyuan Xu <jk.kernel@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
2016-07-31 07:24:20 -06:00
Kever Yang
22948e1015 configs: rockchip: remove no use MACRO
The CONFIG_ROCKCHIP_COMMON and CONFIG_SPL_ROCKCHIP_COMMON are no use now,
remove them.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-31 07:24:20 -06:00
Angelo Dureghello
5c928d0204 m68k: code reformatting for all start.S files
This patch is style-related only, to reformat all the start.S code,
actually not following a coherent style inside single files and
between different cpu start.S files.

Linux format has been respected, as
  - max line width at 80 columns
  - one 8 cols tab between asm instructions and operands
  - inline comments, where any, fixed at col 41

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2016-07-30 22:59:18 +02:00
Vignesh R
9af6ce4248 ARM: dts: am57xx-idk-common: Enable support for QSPI
AM571x and AM572x IDK have a spansion s25fl256s QSPI flash on the board
connected to TI QSPI over CS0. Hence, add QSPI and flash slave
DT nodes.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Vignesh R
70ebdd775b ARM: dts: dra7xx: Update spi-max-frequency for QSPI
According to AM572x DM SPRS953A, QSPI max bus speed is 76.8MHz.
Therefore update the spi-max-frequency value of QSPI node for DRA74 and
DRA72 evm. This increase flash read speed by ~2MB/s.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-30 00:15:00 +05:30
Lokesh Vutla
4d790788ce ARM: dra7xx: Change DPLL_PER_HS13 divider value
According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence
update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz
clock, so that driver can use the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-07-30 00:15:00 +05:30
Tom Rini
4711e7f7af Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2016-07-28 08:45:00 -04:00
Stefan Agner
ae440ab02d colibri_imx7: add Colibri iMX7S/iMX7D module support
This commit adds support for the Toradex Computer on Modules
Colibri iMX7S/iMX7D. The two modules/SoC's are very similar hence
can be easily supported by one board. The board code detects RAM
size at runtime which is one of the differences between the two
boards. The board also uses the UART's in DTE mode, hence making
use of the new DTE support via serial DM.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28 13:27:19 +02:00
Fabio Estevam
5c392017f5 mx7dsabresd_secure_defconfig: Use CONFIG_ARMV7_BOOT_SEC_DEFAULT
There is no need for introducing MX7_SEC, as there is the
CONFIG_ARMV7_BOOT_SEC_DEFAULT option for this purpose.

Switch to CONFIG_ARMV7_BOOT_SEC_DEFAULT and get rid of
MX7_SEC.

Tested by booting a 4.1.15 NXP kernel with mx7dsabresd_secure_defconfig
target.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
2016-07-28 12:08:22 +02:00
Stephen Warren
61f5ddcb7a Add a power domain framework/uclass
Many SoCs allow power to be applied to or removed from portions of the SoC
(power domains). This may be used to save power. This API provides the
means to control such power management hardware.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-07-27 16:29:56 -06:00
Simon Glass
329a449f2c dm: mmc: zynq: Convert zynq to use driver model for MMC
Move zynq to the latest driver model support by enabling CONFIG_DM_MMC,
CONFIG_DM_MMC_OPS and CONFIG_BLK.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
dec49e862e dm: zynq: usb: Convert to CONFIG_DM_USB
Convert zynq USB to driver model. Note this is tested on zynq-zybo only.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
04e38905d7 zynq: Increase the early malloc() size
This is needed to support driver-model conversion of USB and block devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
911954859d dm: Use dm_scan_fdt_dev() directly where possible
Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:54 -06:00
Simon Glass
2e3f1ff63f dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()
This new function is more convenient for callers, and handles pre-relocation
situations automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:07 -06:00
Tom Rini
0b6699ad8e Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-07-26 18:33:04 -04:00
Tom Rini
499a950d41 Merge git://git.denx.de/u-boot-mpc86xx 2016-07-26 17:34:51 -04:00
Tom Rini
9c7a0a600b Merge git://git.denx.de/u-boot-fsl-qoriq 2016-07-26 17:34:28 -04:00
Chen-Yu Tsai
6d7b22a5d8 sunxi: Add EMAC ethernet0 alias for H3 dtsi
The sunxi ethernet address generation code looks for ethernet[0-3]
aliases to find ethernet controllers to generate MAC addresses for.

Without a valid address, the driver fails to register.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:02 +02:00
Hans de Goede
2a5adc5b3c sunxi: Add defconfig and dts file for the Orange Pi PC Plus SBC
There is a new Orange Pi PC *Plus* version available now,
this is an extended version of the regular Orange Pi PC
with sdio wifi and an eMMC.

The upstream kernel devs have decided that they want a separate
dts for the PC Plus rather then sharing a single dts between the
regular PC and the PC Plus. So add a new orangepi_pc_plus_defconfig
to match.

The added dts file matches the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:02 +02:00
York Sun
ed7a3943d5 armv8: fsl-layerscape: mmu: Fix enabling MMU
MMU bit in SCTLR needs to be set explicitly after tables are
created. It isn't an issue for EL3 becuase this bit is already
set by early MMU setup. But for other exception levels this
bit was not set.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:06 -07:00
Hongbo Zhang
3288628a8d ARMv7: PSCI: ls102xa: move secure text section into OCRAM
LS1021 offers two secure OCRAM blocks for trustzone.
This patch moves all the secure text sections into the OCRAM.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:00 -07:00
Hongbo Zhang
aeb901f2a6 ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention
This patch implements PSCI functions for ls102xa SoC following PSCI v1.0,
they are as the list:
    psci_version,
    psci_features,
    psci_cpu_suspend,
    psci_affinity_info,
    psci_system_reset,
    psci_system_off.

Tested on LS1021aQDS, LS1021aTWR.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:49 -07:00
Hongbo Zhang
7e742c276d ARMv7: PSCI: ls102xa: check target CPU ID before further operations
The input parameter CPU ID needs to be validated before furher oprations such
as CPU_ON, this patch introduces the function to do this.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:44 -07:00
Hongbo Zhang
116339d460 ARMv7: PSCI: add PSCI v1.0 functions skeleton
This patch adds all the PSCI v1.0 functions in to the common framework, with
all the functions returning "not implemented" by default, as a common framework
all the dummy functions are added here, it is up to every platform developer to
decide which version of PSCI and which functions to implement.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:39 -07:00
Mingkai Hu
b528b9377d armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:23 -07:00
Qianyu Gong
da4d620c90 armv8: fsl_lsch2: Add SerDes 2 support
New SoC LS1046A belongs to Freescale Chassis Generation 2 and
has two SerDes so we need to add this support in fsl_lsch2.
The SoC related SerDes 2 support will be added in SoC patch.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:16 -07:00
Qianyu Gong
86336e60c5 armv8: fsl-layerscape: Consolidate the LSCH2 common defines
Both LS1012A and LS1043A belong to FSL_LSCH2 and share some common
configurations. So put the common define under FSL_LSCH2 to increase
readability.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:09 -07:00