The ti_sci driver in U-Boot has support for secure_msg as part of it's
do_xfer function. This let's U-boot send secure messages during boot up.
The protocol to send such secure messages is described as part of the
struct ti_sci_secure_msg_hdr. As part of this, there are 2 fields for
checksum and reserved that occupy the first 4 bytes of any secure
message. This is called as the secure_hdr.
As of now, the secure_hdr needs to be 0 init-ed before sending secure
messages. However the existing code was never putting the zero-inited vars
into the secure_buf, leading to possibility of the first 4 bytes of
secure_buf being possibly garbage.
Fix this by initialising the secure_hdr itself to the secure_buf
location, thus when we make secure_hdr members 0, it automatically ensures
the first 4 bytes of secure_buf are 0.
Fixes: 32cd25128b ("firmware: Add basic support for TI System Control Interface (TI SCI)")
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
The number of DDR controllers to be initialised and used should depend
on the device tree with the constraint of the maximum number of
controllers the device supports. Since J721S2 has multiple (2)
controllers, instead of hardcoding the number of probes, move to
depending on the device tree UCLASS_RAM nodes present.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
This commit enables support for DM_SERIAL in the vexpress_ca9x4 boards.
When running the board with the DM_SERIAL driver, the board ran out of
memory in SPL when initialising the DM serial driver.
Thus this required an increase in the pre-allocated SRAM memory. I did
increase it to 0x800, and it now works graciously.
It could probably be set lower, but I do not see any reason not to use the
available SRAM at this point.
Also adds stdout-path to the 'chosen' node in the device tree.
Signed-off-by: Ole P. Orhagen <ole.orhagen@northern.tech>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
In event_type_name() we should avoid possible buffer overruns by checking
the type argument.
Addresses-Coverity-ID: 478862 Out-of-bounds access
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Adds support for assembly files and updates the LINE_PATTERN so it
supports both "cmd" and "savedcmd", which allows reverting the U-Boot
modification in commit 97fbb2eb01 ("scripts/gen_compile_commands.py:
adapt _LINE_PATTERN").
Upstream commits:
- 880946158b011 gen_compile_commands.py: fix path resolve with symlinks in it
- 9e56d3be4bfd2 gen_compile_commands: Sort output compile commands by file name
- 52c15e7e79285 gen_compile_commands: Allow the line prefix to still be cmd_
- 1c67921444bf6 gen_compile_commands: add assembly files to compilation database
Signed-off-by: Brandon Maier <brandon.maier@collins.com>
Cc: Joao Marcos Costa <jmcosta944@gmail.com>
Enrico Leto <enrico.leto@siemens.com> says:
The common folder was initialially created for the common parts of
the products based on draco-am355x board family. We have the
product lines 'pxm2', 'rut' and the base line unfortunately named
'draco'! Adding the new capricorn-imx8 board family, the files
were enhanced without cleanup.
Simplify first EEPROM probe and access that implements both i2c
with & without driver model. Use abstraction functions for this.
Move all am355x specifics to a new file 'board_am335x'.
Clean-up includes, config checks, maintainer.
Adding the capricorn board family some parts diverge from draco family.
The switches used were not pertinent and need to be enhanced for each new
board of the capricorn family. Replace them through the SOC name 'AM33XX'
and 'IMX8'.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
The common folder was initialially created for the common parts of the
products based on draco-am355x board family. These are the product lines
'pxm2', 'rut' and the base line named 'draco'!
Adding the new capricorn-imx8 board family, common was enhanced without
cleanup.
- rename 'common/board.c' to 'common/board_am335x.c'
- add 'common/board_am335x.h' for export to the product lines
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
NAND was used in the early development phase of etamin. The board runs now
on MMC. This setting is no more used -> remove to simplify the board file.
Further clean-up of etamin should remove all NAND settings. Complete clean-
up of etamin board will take place in a separate patch serie.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Add support for driver model where EEPROM data are read in draco board.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Since we have boards using the driver model or not for i2c, use abstraction
function to probe the i2c, check the EEPROM and read from EEPROM.
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Move the I2C and EEPROM address definitions in common board header.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Enrico Leto <enrico.leto@siemens.com>
Writing to eMMC using HS200 mode work more reliably then other modes on
RK356x boards.
Add device tree props and enable Kconfig options for eMMC HS200 mode on
the generic RK3566/RK3568 board. Also enable the pinctrl driver in SPL
and add missing rk3568-generic.dtb to Makefile.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable USB releated config to support
boot from usb.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Testing has shown that writing to eMMC using HS400 modes on RK3568
result in an ERROR.
Change the tap number for transmit clock to fix this.
Also stop DLL when config_dll() is called to disable DLL.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Testing has shown that writing to eMMC using a slower mode then HS200
typically generate an ERROR on first attempt on RK3588.
# Rescan using MMC legacy mode
=> mmc rescan 0
# Write a single block to sector 0x4000 fails with ERROR
=> mmc write 20000000 4000 1
# Write a single block to sector 0x4000 now works
=> mmc write 20000000 4000 1
With the MMC_SPEED_MODE_SET Kconfig option enabled.
Writing to eMMC using HS200 mode work more reliably than slower modes on
RK35xx boards. Enable MMC_HS200_SUPPORT Kconfig option by default to
prefer use of HS200 mode on RK356x and RK3588.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Testing has shown that writing to eMMC using DDR52 mode does not seem to
work on RK356x and RK3588 boards.
A simple test of writing a single block to e.g. sector 0x4000 fails:
# Rescan using DDR52 mode
=> mmc rescan 4
# Write a single block to sector 0x4000 fails with ERROR
=> mmc write 20000000 4000 1
With the MMC_SPEED_MODE_SET Kconfig option enabled.
Fix this by removing the mmc-ddr-1_8v prop from sdhci nodes in affected
board u-boot.dtsi files.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable Kconfig options to support AHCI, PCI and USB features. This help
keep rk3588-quartzpro64 in sync with other RK3588 boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Writing to eMMC using HS200 mode work more reliably then other modes on
RK3588 boards.
Enable MMC_HS200_SUPPORT Kconfig option to prefer use of HS200 mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Weizhao Ouyang <o451686892@gmail.com>
Remove unnecessary status props from rk35xx u-boot.dtsi files, regular
device tree files or default value already enable the affected nodes.
Also reorder bootph-pre-ram and clock-frequency props alphabetically in
rk3588s-u-boot.dtsi uart2 node.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a default u-boot,spl-boot-order prop to rk3588s-u-boot.dtsi and
remove the prop from board u-boot.dtsi files using the default value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync rk3588 device tree from linux v6.7.
Also drop the rockchip,rk3568-dwc3 compatible now that dwc3-generic
driver support the rockchip,rk3588-dwc3 compatible.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Move uart2 bootph-pre-ram and clock-frequency props from board to SoC
u-boot.dtsi. Regular board device tree already enables the uart2 node,
so status prop is dropped from u-boot.dtsi file.
Also remove unnecessary stdout-path = &uart2, regular board device tree
already provide a stdout-path = "serial2:" value.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip RK3399 and RK3588 SoCs can support wide range of bootflows.
Without full bootflow commands, it can be difficult to
figure out issues if any, hence enable by default.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Shantur Rathore <i@shantur.com>
OPTEE gets loaded into a memory region overlapping with the ram disk.
Fix the ramdisk address so it doesn't overlap with the OPTEE memory
region.
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rv1126 requires OPTEE as it provides pcsi support. Mainline Linux
kernel will fail to boot without this.
Select SPL_OPTEE_IMAGE when building FIT image. TEE must be provided
when building.
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sonoff iHost is gateway device designed to provide a Smart Home Hub,
it is based on Rockchip RV1126. There is also a version with 2GB RAM
based off the RV1109 dual core SoC however this works with the same
config as the RV1126 for uboot purposes.
Features:
- Rockchip RV1126
- 4GB DDR4
- 8GB eMMC
- microSD slot
- RMII Ethernet PHY
- 1x USB 2.0 Host
- 1x USB 2.0 OTG
- Realtek RTL8723DS WiFi/BT
- EFR32MG21 Silabs Zigbee radio
- Speaker/Microphone
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for ddr4 on rv1126. Timing detection files are imported
from downstream Rockchip BSP u-boot. Allow selecting ddr4 ram with
define CONFIG_RAM_ROCKCHIP_DDR4.
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Sync linux dts files for rv1126 boards from linux v6.8-rc1 tag. Includes
the newly added dts for Sonoff iHost.
Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Enable the DM_ETH_PHY and PHY_REALTEK now that the designware ethernet
driver call eth_phy_set_mdio_bus() to assist with resetting the eth PHY
during probe.
Fixes ethernet on the v1.21 hw revision of Radxa ROCK Pi E:
=> mdio list
ethernet@ff540000:
1 - RealTek RTL8211F <--> ethernet@ff540000
=> net list
eth0 : ethernet@ff540000 86:e0:c0:ea:fa:a9 active
eth1 : ethernet@ff550000 86:e0:c0:ea:fa:a8
=> dhcp
Speed: 1000, full duplex
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
DHCP client bound to address 192.168.1.114 (1004 ms)
Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.
Could not get PHY for ethernet@ff540000: addr -1
Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.
This help fix ethernet on Radxa ROCK Pi E v1.21:
=> mdio list
ethernet@ff540000:
1 - RealTek RTL8211F <--> ethernet@ff540000
Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The CONFIG_SPL_STACK for rk3036 is removed in below patch, need to add
it back.
Fixes: f113d7d303 ("Convert CONFIG_SPL_STACK to Kconfig")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This patch add support for additional bank info used by LPDDR5.
Series-version: 2
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* In smbios command
- write 'Not Specified' for missing strings
- show correct table size for SMBIOS2.1 entry point
- adjust formatting of handle numbers
- add missing colon after UUID
* In generated SMBIOS table
- avoid introducing 'Unknown' string for missing properties
- provide RISC-V vendor ID in the type 4 structure
- provide the correct chassis handle in structure type 2
* Rename Structure Table Maximum Size field in SMBIOS 3 entry point
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Merge tag 'smbios-2024-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request smbios-2024-04-rc2
* In smbios command
- write 'Not Specified' for missing strings
- show correct table size for SMBIOS2.1 entry point
- adjust formatting of handle numbers
- add missing colon after UUID
* In generated SMBIOS table
- avoid introducing 'Unknown' string for missing properties
- provide RISC-V vendor ID in the type 4 structure
- provide the correct chassis handle in structure type 2
* Rename Structure Table Maximum Size field in SMBIOS 3 entry point
In the SMBIOS 3 entry point the Structure Table Maximum Size field was
incorrectly named max_struct_size. A Maximum Structure Size field only
exists in the SMBIOS 2.1 entry point and has a different meaning.
Call the Structure Table Length field table_maximum_size.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Only the SMBIOS 2.1 entry point has a field for the maximum structure size.
As we have switched to an SMBIOS 3 entry point remove the superfluous
calculation.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The SMBIOS table size for SMBIOS2.1 entry points is in field 'Structure
Table Length' (offset 0x16) and not in field 'Maximum Structure Size'
(offset 0x08).
Rename the receiving variable max_struct_size to table_maximum_size
to avoid future confusion.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The chassis handle field in the type 2 structure must point to the handle
of the type 3 structure.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For RISC-V CPUs the SMBIOS Processor ID field contains
the Machine Vendor ID from CSR mvendorid.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The SMBIOS specification describes: "If a string field references no string,
a null (0) is placed in that string field."
Accordingly we should avoid writing a string "Unknown" to the SMBIOS table.
dmidecode displays 'Not Specified' if the string number is 0.
Commit 00a871d34e ("smbios: empty strings in smbios_add_string()")
correctly identified that strings may not have length 0 as two
consecutive NULs indentify the end of the string list. But the suggested
solution did not match the intent of the SMBIOS specification.
Fixes: 00a871d34e ("smbios: empty strings in smbios_add_string()")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
When no string is present in a table, next_ptr points to the same
location as eos. When calculating the string table length, we would only
reserve one \0. By spec a SMBIOS table has to end with two \0\0 when no
strings a present.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
