Commit graph

592 commits

Author SHA1 Message Date
Francis Laniel
5ffcf7c590 arm: lib: add __gnu_thumb1_case_si
The assembly for __gnu_thumb1_case_si was taken from upstream gcc and adapted
as width suffix was removed for the add instruction [1].

Signed-off-by: Francis Laniel <francis.laniel@amarulasolutions.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
[1] 4f181f9c7e/libgcc/config/arm/lib1funcs.S (L2156)
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by:  Tony Dinh <mibodhi@gmail.com>
2023-04-06 19:10:08 -04:00
Tom Rini
605bc145f9 Merge branch 'master' into next 2023-03-27 15:19:57 -04:00
Tony Dinh
c5f4cdb8eb console: Use flush() before panic and reset
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.

Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-22 12:51:08 -04:00
Andre Przywara
29c579a249 arm: semihosting: replace inline assembly with assembly file
So far we used inline assembly to inject the actual instruction that
triggers the semihosting service. While this sounds elegant, as it's
really only about one instruction, it has some serious downsides:
- We need some barriers in place to force the compiler to issue writes
  to a data structure before issuing the trap instruction.
- We need to convince the compiler to actually fill the structures that
  we use pointers to.
- We need a memory clobber to avoid the compiler caching the data in
  those structures, when semihosting writes data back.
- We need register arguments to make sure the function ID and the
  pointer land in the right registers.

This is all doable, but fragile and somewhat cumbersome. Since we now
have a separate function in an extra file anyway, we can do away with
all the magic and just write that in an actual assembly file.
This is much more readable and robust.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-03-06 17:06:17 -05:00
Pierre-Clément Tosi
c55c2a8565 arm64: Initialize TLB memory if CMO_BY_VA_ONLY
Memory used to hold the page tables is allocated from the top of RAM
with no prior initialization and could therefore hold invalid data. As
invalidate_dcache_all() will be called before the MMU has been
initialized and as that function relies indirectly on the page tables
when using CMO_BY_VA_ONLY, these must be in a valid state from their
allocation.

Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fix checkpatch warnings, and rebased
  to the upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: e3ceef4230
2023-03-06 17:03:55 -05:00
Simon Glass
4c77608942 Correct SPL uses of SAVE_PREV_BL_INITRAMFS_START_ADDR
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SAVE_PREV_BL_INITRAMFS_START_ADDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
10f8bc0983 Correct SPL uses of SAVE_PREV_BL_FDT_ADDR
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SAVE_PREV_BL_FDT_ADDR defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
210af54947 Correct SPL uses of LMB
This converts 9 usages of this option to the non-SPL form, since there is
no SPL_LMB defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:39 -05:00
Simon Glass
9df5011e1e arm: Drop CONFIG_MMU
This option does not exist, so the #ifdefs do nothing. Drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:48 -05:00
Tom Rini
1c88640fc8 arm: lib1funcs.S: Update compatibility with Linux comment slightly
At this point, the Linux code for "lib1funcs" has changed rather
dramatically. While a resync would be beneficial, it's outside the scope
of what we need here.  Simply remove the define for CONFIG_AEABI and
tests for it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Heinrich Schuchardt
7e808fcc97 efi_loader: add .rela sections to .text on arm64
_relocate() needs the information in .rela* for self relocation
of the EFI binary.

Fixes: d7ddeb66a6 ("efi_loader: fix building aarch64 EFI binaries")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-01-13 09:09:07 +01:00
Tom Rini
cebdfc22da Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-09 11:30:08 -05:00
Heinrich Schuchardt
4bba71ff83 efi_loader: make .data section of *_efi.so files RW
When building with binutils 2.39 warnings

    *_efi.so has a LOAD segment with RWX permissions

occur.

Use SHF_WRITE | SHF_ALLOC as section flags for the .data section.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-06 22:27:30 +01:00
Heinrich Schuchardt
d7ddeb66a6 efi_loader: fix building aarch64 EFI binaries
While our EFI binaries execute without problems on EDK II they crash on
a Lenovo X13s. Let our binaries look more like what EDK II produces:

* move all writable data to a .data section
* align sections to 4 KiB boundaries (matching EFI page size)
* remove IMAGE_SCN_LNK_NRELOC_OVFL from .reloc section flags

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-01-04 13:17:42 +01:00
Heinrich Schuchardt
3ec07c99d8 efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
For the 64bit EFI binaries that we create set the
IMAGE_FILE_LARGE_ADDRESS_AWARE characteristic in the PE-COFF header
to indicate that they can handle addresses above 2 GiB.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2022-12-29 10:51:50 +01:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
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Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Kautuk Consul
1c03ab9f4b lib: Add common semihosting library
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.

Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-12-08 15:15:22 +08:00
Tom Rini
fc2240046c arm: Use the WEAK assembly entry point consistently
It is a bad idea, and more modern toolchains will fail, if you declare
an assembly function to be global and then weak, instead of declaring it
weak to start with. Update assorted assembly files to use the WEAK macro
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
2022-12-06 15:30:30 -05:00
Tom Rini
2568bd6db7 arm: Remove unused mx27 code
We no longer have any i.MX27 platforms, remove the remaining support
code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-05 16:07:13 -05:00
Tom Rini
65cc0e2a65 global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:08 -05:00
Pali Rohár
04bb5e95be arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=y
Apply commit 534f0fbd65 ("arm64: Fix relocation of env_addr if
POSITION_INDEPENDENT=y") also for 32-bit ARM.

This change fixes crashing of U-Boot on ARMv7 (Omap3 / Cortex-A8) Nokia N900
phone (real HW). Note that qemu emulator of this board with same u-boot.bin
binary has not triggered this crash.

Crash happened after U-Boot printed following debug lines to serial console:

    initcall: 0001ea8c (relocated to 8fe0aa8c)
    Loading Environment from <NULL>... Using default environment
    Destroy Hash Table: 8fe25a98 table = 00000000
    Create Hash Table: N=387

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-11-21 09:23:00 -05:00
Andre Przywara
2e32930087 arm: smh: Allow semihosting trap calls to be inlined
Currently our semihosting trap function is somewhat fragile: we rely
on the current compiler behaviour to assign the second inline assembly
argument to the next free register (r1/x1), which happens to be the
"addr" argument to the smh_trap() function (per the calling convention).
I guess this is also the reason for the noinline attribute.

Make it explicit what we want: the "addr" argument needs to go into r1,
so we add another register variable. This allows to drop the "noinline"
attribute, so now the compiler beautifully inlines just the trap
instruction directly into the calling function.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-11-02 13:31:40 -04:00
Andre Przywara
d660a82934 arm: smh: Make semihosting trap calls more robust
Commit f4b540e25c5c("arm: smh: Fix uninitialized parameters with newer
GCCs") added a memory clobber to the semihosting inline assembly trap
calls, to avoid too eager GCC optimisation: when passing a pointer, newer
compilers couldn't be bothered to actually fill in the structure that it
pointed to, as this data would seemingly never be used (at least from the
compiler's point of view).
But instead of the memory clobber we need to tell the compiler that we are
passing an *array* instead of some generic pointer, this forces the
compiler to actually populate the data structure.
This involves some rather hideous cast, which is best hidden in a macro.

But regardless of that, we actually need the memory clobber, but for two
different reasons: explain them in comments.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-11-02 13:31:40 -04:00
Andre Przywara
30b315b48d arm: smh: specify Thumb trap instruction
The ARM semihosting interface uses different trap instructions for
different architectures and instruction sets. So far we were using
AArch64 and ARMv7-M, and had an untested v7-A entry. The latter does
not work when building for Thumb, as can be verified by using
qemu_arm_defconfig, then enabling SEMIHOSTING and SYS_THUMB_BUILD:
==========
{standard input}:35: Error: invalid swi expression
{standard input}:35: Error: value of 1193046 too large for field of 2 bytes at 0
==========

Fix this by providing the recommended instruction[1] for Thumb, and
using the ARM instruction only when not building for Thumb. This also
removes some comment, as QEMU for ARM allows to now test this case.
Also use the opportunity to clean up the inline assembly, and just define
the actual trap instruction inside #ifdef's, to improve readability.

[1] https://developer.arm.com/documentation/dui0471/g/Semihosting/The-semihosting-interface?lang=en

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-11-02 13:31:40 -04:00
Simon Glass
984639039f Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE
and this makes it imposible to use CONFIG_VAL().

Rename it to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-31 11:01:31 -04:00
Ovidiu Panait
85e68ae001 common/board_f: move CONFIG_MACH_TYPE logic to arch/arm/lib/bdinfo.c
asm/mach_type.h header and CONFIG_MACH_TYPE macro are arm-specific, so move
related bdinfo logic to arch_setup_bdinfo() in arch/arm/lib/bdinfo.c.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
2022-10-06 21:05:17 -04:00
Simon Glass
d9d7c20b73 treewide: Drop bootm_headers_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-09-29 16:07:57 -04:00
Tom Rini
e9a1ff9724 Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-09-19 16:07:12 -04:00
Nathan Barrett-Morrison
7a0d88076b Add in the ability to load and boot an uncompressed kernel image during the Falcon Mode boot sequence.
This is required for architectures which do not support compressed kernel images (i.e. ARM64).  This is only used while not booting via FIT image.

Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-09-14 15:23:03 -04:00
Sergei Antonov
583f1b2f10 arm: ARMv4 assembly compatibility
There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).

A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.

v1 -> v2:
Comment update. Pointed out by Andre Przywara.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
CC: Samuel Holland <samuel@sholland.org>
CC: Ye Li <ye.li@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Andre Przywara <andre.przywara@arm.com>
CC: Marek Vasut <marex@denx.de>
CC: Sean Anderson <sean.anderson@seco.com>
CC: Tom Rini <trini@konsulko.com>
2022-09-02 13:40:42 -04:00
Philip Oberfichtner
b6664eace8 ARM: cache: Allow SPL to build cache-pl310.c
Introduce the new Kconfig symbol CONFIG_SPL_SYS_L2_PL310 to allow the
SPL to build cache-pl310.c.

Before this commit, the SPL could enable the PL310 L2 cache [1], but the
cache maintenance functions from cache-pl310.c were only useable for
non-SPL builds.

After enabling the cache one must be able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.

[1] See for example arch/arm/mach-imx/cache.c: v7_outer_cache_enable()

Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-09-01 17:18:42 -04:00
Sean Anderson
f4b540e25c arm: smh: Fix uninitialized parameters with newer GCCs
Newer versions of GCC won't initialize parts of structures which don't
appear to be used. This results in uninitialized semihosting parameters
passed via R1. Fix this by marking the inline assembly as clobbering
memory.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-08-31 12:21:47 -04:00
Andre Przywara
81e712a917 ARM: relocate: Fix Thumb code by using proper label type
The generic ARM relocate_code function was using its own function entry
point as a relocation base, and it was obtaining that address by using
the "adr" instruction on that entry point label.
However that label is not just an ordinary label, instead we explicitly
mark it as a function start address. Normally that doesn't change much
(other than for debugging), but when assembled in Thumb mode, newer
versions of the GNU assembler prepare everything for this address being
used as the argument to a "bx" call, so make sure bit 0 is set in there
to mark this function as Thumb code. Of course this doesn't end up very
well when we use this address for the ensuing memcpy operation.

To avoid this problem, and to solve it in a robust way, add an extra
label, which is not marked as a function entry, and use that for the adr
instruction. This lets all assemblers generate the right immediate offset
in the "adr" instruction.

This fixes in particular ARMv7-M ports when using GNU binutils v2.37 or
newer (commit d3e52e120b68 seems to trigger the change in behaviour).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Jesse Taube <mr.bossman075@gmail.com>
2022-07-26 17:53:43 -04:00
Ashok Reddy Soma
65168910ad zynqmp: Run board_get_usable_ram_top() only on main U-Boot
With commit ce39ee28ec ("zynqmp: Do not place u-boot to reserved memory
location"), the function board_get_usable_ram_top() is allocating
MMU_SECTION_SIZE of about 2MB using lmb_alloc(). But we dont have this
much memory in case of mini U-Boot.

Keep these functions which use lmb under CONFIG_LMB so that they are
compiled and used only when LMB is enabled.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/75e52def75f573e554a6b177a78504c128cb0c4a.1657183534.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Michal Simek
b09e462482 arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
CONFIG_OF_LIBFDT is used twice for guarding the same code. It is enough to
do it once that's why remove additional ifdefs from arm and risc-v code.

Fixes: 0c303f9a66 ("image: Drop IMAGE_ENABLE_OF_LIBFDT")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/f8e3ff9124195cbd957874de9a65ef79760ef5e7.1657183634.git.michal.simek@amd.com
2022-07-26 08:23:54 +02:00
Tom Rini
eaf6ea6a1d Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
- Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR
- Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack
  pointer directly, otherwise we use the common calculation.
- On some platforms that were using the standard calculation but did not
  set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them.
- On a small number of platforms that were not subtracting
  GENERATED_GBL_DATA_SIZE do so now via the standard calculation.
- CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most
  board config header files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-06-06 12:09:19 -04:00
Sai Pavan Boddu
2d25f63cc0 arm: gic_v2: Skip gic_init_secure when cpu is not in el3
This would prevent configuring non-secure regs in case gic security
extensions are not emulated in Qemu.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-23 09:33:10 -04:00
Pali Rohár
948da7773e arm: Add new config option ARCH_VERY_EARLY_INIT
When this option is set then ARM _main() function would call
arch_very_early_init() function at the beginning. It would be before
calling any other functions like debug_uart_init() and also before
initializing C runtime environment.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-05-16 11:31:33 +02:00
Pali Rohár
5165d2a04a arm: Do not compile vector table when SYS_NO_VECTOR_TABLE is enabled
Vector table is not used when SYS_NO_VECTOR_TABLE is enabled.
So do not compile it and reduce image size.

Signed-off-by: Pali Rohár <pali@kernel.org>
2022-04-21 12:31:36 +02:00
Dzmitry Sankouski
12a3e1ada0 arm: init: save previous bootloader data
When u-boot is used as a chain-loaded bootloader (replacing OS kernel),
previous bootloader leaves data in RAM, that can be reused.

For example, on recent arm linux system, when chainloading u-boot,
there are initramfs and fdt in RAM prepared for OS booting. Initramfs
may be modified to store u-boot's payload, thus providing the ability to
use chainloaded u-boot to boot OS without any storage support.

Two config options added:
- SAVE_PREV_BL_INITRAMFS_START_ADDR
  saves initramfs start address to 'prevbl_initrd_start_addr' environment
  variable
- SAVE_PREV_BL_FDT_ADDR
  saves fdt address to 'prevbl_fdt_addr' environment variable

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2022-04-04 14:53:26 -04:00
Sean Anderson
bbe310cdaf arm64: Catch non-emulated semihosting calls
If a debugger is not attached to U-Boot, semihosting calls will raise a
synchronous abort exception. Try to catch this and disable semihosting
so we can e.g. use another uart if one is available. In the immediate
case, we return an error, since it is not always possible to check for
semihosting beforehand (debug uart, user-initiated load command, etc.)

We handle all possible semihosting instructions, which is probably
overkill. However, we do need to keep track of what instruction set
we're using so that we don't suppress an actual error.

A future enhancement could try to determine semihosting capability by
inspecting the processor state.  There's an example of this at [1] for
RISC-V. The equivalent for ARM would inspect the monitor modei
enable/select bits of the DSCR. However, as the article notes, an
exception handler is still helpful in order to catch disconnected
debuggers.

[1] https://tomverbeure.github.io/2021/12/30/Semihosting-on-RISCV.html#avoiding-hangs-when-a-debugger-is-not-connected

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
385d69d76b arm: smh: Add option to detect semihosting
These functions are intended to support detecting semihosting and
falling back gracefully to alternative implementations. The test starts
by making semihosting call. SYS_ERRNO is chosen because it should not
mutate any state. If this semihosting call results in an exception
(rather than being caught by the debugger), then the exception handler
should call disable_semihosting() and resume execution after the call.

Ideally, this would just be part of semihosting by default, and not a
separate config. However, to reduce space ARM SPL doesn't include
exception vectors by default. This means we can't detect if a
semihosting call failed unless we enable them. To avoid forcing them to
be enabled, we use a separate config option. It might also be possible
to try and detect whether a debugger has enabled (by reading HDE from
DSCR), but I wasn't able to figure out a way to do this from all ELs.

This patch just introduces the generic code to handle detection. The
next patch will implement it for arm64 (but not arm32).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
e97ac4780d arm64: Save esr in pt_regs
To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 16:56:53 -04:00
Sean Anderson
3ea744e873 arm: smh: Add some functions for working with the host console
This adds three wrappers around the semihosting commands for reading and
writing to the host console. We use the more standard getc/putc/puts
names instead of readc/writec/write0 for familiarity.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
dcc4f9623e arm: smh: Remove smhload command
This command's functionality is now completely implemented by the
standard fs load command. Convert the vexpress64 boot command (which is
the only user) and remove the implementation.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
dbf6f7c952 cmd: fdt: Use start/size for chosen instead of start/end
Most U-Boot command deal with start/size instead of start/end. Convert
the "fdt chosen" command to use these semantics as well. The only user
of this subcommand is vexpress, so convert the smhload command to use
this as well. We don't bother renaming the variable in vexpress64's
bootcommand, since it will be rewritten in the next commit.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
8e1c9fe243 spl: Add semihosting boot method
This adds a boot method for loading the next stage from the host. It is
mostly modeled off of spl_load_image_ext. I am not really sure why/how
spl_load_image_fat uses three different methods to load the image, but
the simple case seems to work OK for now.

To control the presence of this boot method, we add a config symbol.
While we're at it, we update the original semihosting config symbol.

I think semihosting has some advantages of other forms of JTAG boot.
Common other ways to boot from JTAG include:

- Implementing DDR initialization through JTAG (typically with dozens of
  lines of TCL) and then loading U-Boot. The DDR initialization
  typically uses hard-coded register writes, and is not easily adapted
  to different boards. BOOT_DEVICE_SMH allows booting with SPL,
  leveraging U-Boot's existing DDR initialization code. This is the
  method used by NXP's CodeWarrior IDE on Layerscape processors (see
  AN12270).
- Loading a bootloader into SDRAM, waiting for it to initialize DDR, and
  then loading U-Boot. This is tricky, because the debugger must stop the
  boot after the bootloader has completed its work. Trying to load
  U-Boot too early can cause failure to boot. This is the method used by
  Xilinx with its Zynq(MP) processors.
- Loading SPL with BOOT_DEVICE_RAM and breaking before SPL loads the
  image to load U-Boot at the appropriate place. This can be a bit
  tricky, because the load address is dependent on the header size. An
  elf with symbols must also be used in order to stop at the appropriate
  point. BOOT_DEVICE_SMH can be viewed as an extension of this process,
  where SPL automatically stops and tells the host where to place the
  image.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
12a05b3bcd arm: smh: Add some file manipulation commands
In order to add filesystem support, we will need to be able to seek and
write files. Add the appropriate helper functions.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
79f6ad6a7b arm: smh: Document functions in header
This adds some documentation for semihosting functions in the header.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00
Sean Anderson
80e62ccfa6 arm: smh: Return errno on error
Instead of printing in what are now library functions, try to return a
numeric error code. This also adjust some functions (such as read) to
behave more similarly to read(2). For example, we now return the number
of bytes read instead of failing immediately on a short read.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-04-01 15:03:13 -04:00