Commit graph

13 commits

Author SHA1 Message Date
Neha Malcom Francis
1bc527e8f4 am64x: dts: binman: Package tiboot3.bin, tispl.bin u-boot.img
Support added for HS and GP boot binaries for AM64x.

HS-SE:
    * tiboot3-am64x_sr2-hs-evm.bin
    * tispl.bin
    * u-boot.img

HS-FS:
    * tiboot3-am64x_sr2-hs-fs-evm.bin
    * tispl.bin
    * u-boot.img

GP:
    * tiboot3.bin --> tiboot3-am64x-gp-evm.bin
    * tispl.bin_unsigned
    * u-boot.img_unsigned

Note that the bootflow followed by AM64x requires:

tiboot3.bin:
	* R5 SPL
	* R5 SPL dtbs
	* sysfw
	* board-cfg
	* pm-cfg
	* sec-cfg
	* rm-cfg

tispl.bin:
	* ATF
	* OP-TEE
	* A53 SPL
	* A53 SPL dtbs

u-boot.img:
	* A53 U-Boot
	* A53 U-Boot dtbs

Reviewed-by: Simon Glass <sjg@chromium.org>
[afd@ti.com: changed output binary names appropriately]
Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-07-21 19:36:58 -04:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Roger Quadros
4599bb7d79 arm: dts: k3-am64: Fix CPSW3G ethernet
As MDIO driver does not support Driver Model, the
pinctrl settings in the MDIO node will not
be applied resulting in PHY not being detected.

To workaround this we add the MDIO pinctrl in
the CPSW3G node in the -u-boot.dtsi file.

Add the missing MDIO and RGMII pinctrl nodes in
k3-am642-r5-evm.dts

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:53 -05:00
Roger Quadros
f85631d06f arm: dts: k3-am6: Fix "EEPROM not available" error
We need to enable i2c0 so u-boot can read from EEPROM.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:53 -05:00
Georgi Vlaev
e7356f08e9 arm: dts: k3-am642-*: Mark the memory node with u-boot, dm-spl
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions
for ram and bank init") ddr_init() and dram_bank_init() have
switched to fdtdec for getting the memory configuration from
the am64xx dts files instead of using hardcoded values. This
requires an accessible memory node in SPL as we already have
in k3-am642-r5-evm.dts.

Make the memory node accessible in A53 SPL for both am642-sk
and am642-evm and in am642-sk R5 SPL.

Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-26 10:32:26 -04:00
Vignesh Raghavendra
8d1acfd8de ARM: dts: k3-am642: Correct timer frequency
Timer0 runs at 200MHz,and the clock-frequency defined in DT is
incorrect. Fix it.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-By: Nishanth Menon <nm@ti.com>
2022-04-04 19:02:04 -04:00
Aswath Govindraju
7ca1af635a arm: dts: k3-am642-evm-u-boot: Add u-boot, dm-spl tag in the pinmux node of mmc1
Add u-boot,dm-spl tag in the pinmux device tree node, required for MMCSD1
subsystem.

Fixes: b6059ddc45 ("arm: dts: k3-am642: Add r5 specific dt support")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-10 20:10:20 -04:00
Aswath Govindraju
1c8b404b88 arm: dts: k3-am642-evm-u-boot: Add U-Boot tags and fix the dr_mode to peripheral for USB subsystem
Add U-Boot tags and fix the dr_mode as peripheral in U-Boot to support DFU
by default.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-8-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Suman Anna
a97ee92e4a arm: dts: k3-am642-evm: Add sysreset controller node
The AM64x SoC uses a central Device Management and Security Controller
(DMSC) processor that manages all the low-level device controls
including the system-wide SoC reset. The system-wide reset is managed
through the system reset driver.

Add a sysreset controller node as a child of the dmsc node to enable
the "reset" command from U-Boot prompt for the K3 AM642 EVM.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27 14:53:14 +05:30
Vignesh Raghavendra
bc17fccbd0 ARM: dts: k3-am64-main: Add CPSW DT nodes
AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same
(based on kernel DT).

Disable second port as its by default set to ICSS usage on EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12 16:36:39 +05:30
Lokesh Vutla
45b7a9fc08 arm: dts: am642-evm: Add I2C nodes
Add I2C nodes for AM64 and enable pinmux for i2c0 for reading eeprom data.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12 16:32:44 +05:30
Lokesh Vutla
93e0bfb829 arm: dts: k3-am64-evm: Make chip id available before pre-reloc
Chipid will be needed for SoC detection for all stages of U-Boot.
So make it u-boot,dm-spl

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12 16:32:44 +05:30
Dave Gerlach
b6059ddc45 arm: dts: k3-am642: Add r5 specific dt support
Add initial support for dt that runs on r5.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12 16:30:28 +05:30