Commit graph

6 commits

Author SHA1 Message Date
Marek Vasut
c7ea9612df arm64: dts: imx8mp: Drop EQoS clock workaround
The assigned-clock no longer have to be dropped, the clock are now
defined in clk-imx8mp.c and used by DWMAC driver to configure the
DWMAC clock. Drop the workarounds from U-Boot specific DT extras.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-03-30 13:49:49 +02:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Tim Harvey
22adeef0f2 arm: dts: imx8mp-venice-gw74xx: update M2 gpio hogs
Update the M2 socket gpio hogs such that they are not active on boot by
flagging them as GPIO_ACTIVE_HIGH so that 'output-high' drives high.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-10-20 17:35:52 +02:00
Tim Harvey
35a9b62400 arm: dts: imx8mp-venice-gw74xx: fix uart configuration gpio hogs
Update the UART config gpio hogs such that it is configured for RS232
by default on boot. Additionally rename them to match the names used
on the reset of the venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-10-20 17:35:52 +02:00
Tim Harvey
1581f17378 arm: dts: imx8mp-venice-gw74xx: add dsa phy handles to u-boot dtsi
The upstream Linux DSA drivers do not require phy-handle nodes in
the DSA ports yet the U-Boot DSA drivers do. Add a phy-handle and
the mdio nodes to the u-boot.dtsi file so that future dts file
syncrhonization between Linux and U-Boot don't break networking.

Fixes: e0caa84ca6 ("imx8mp: synchronise device tree with linux")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-09-20 18:30:02 +02:00
Tim Harvey
2395625209 board: gateworks: venice: add imx8mp-venice-gw740x support
The GW74xx is based on the i.MX 8M Plus SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - Gateworks System Controller
 - PCIe Gen 3.0 switch (build option)
 - USB 3.0 HUB
 - USB Type-C front panel connector
 - GPS
 - 3-axis accelerometer
 - CAN bus
 - 6x GbE RJ45 front-panel jacks
  - 1x IMX8M FEC RGMII GbE (with Passive PoE)
  - 5x IMX8M EQOS RGMII 6 port GbE Switch
    (1x with 802.3af class 5 Active PoE)
 - RS232/RS485/RS422 serial transceiver
 - MIPI header (DSI/CSI/GPIO/PWM/I2S)
 - DigI/O header (UART/GPIO/I2C/ADC)
 - 802.11ac WiFi
 - Bluetooth BLE
 - 3x MiniPCIe sockets with PCI/USB
 - 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
 - PMIC
 - Wide range DC input supply (8V to 60V DC)

Do the following to add support for this and future imx8mp-venice boards:
 - add dts
 - add DRAM config
 - add PMIC config
 - add IMX8MP support in spl.c and venice.c

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-04-21 12:44:24 +02:00