Commit graph

187 commits

Author SHA1 Message Date
Stefan Roese
0ceb2dae78 arm: mvebu: Add complete SDRAM ECC scrubbing
This patch introduces the SDRAM scrubbing for ECC enabled board
to fill/initialize the ECC bytes. This is done via the XOR engine
to speed up the process. The scrubbing is a 2-stage process:

1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot
2) U-Boot scrubs the remaining SDRAM area(s)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:33 +02:00
Stefan Roese
a8b57a90ec arm: mvebu: dram.c: Rework dram_init() and dram_init_banksize()
Rework these functions so that dram_init_banksize() does not call
dram_init() again. It only needs to set the banksize values in the
bdinfo struct.

Make sure to also clip the size of the last bank if it exceeds the
maximum allowed value of 3 GiB (0xc000.0000). Otherwise other
address windows (e.g. PCIe) will overlap with this memory window.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:29 +02:00
Stefan Roese
8a83c65f57 arm: mvebu: Display ECC enabled / disabled upon bootup
This patch adds "(ECC enabled)" or "(ECC disabled)" to the DRAM
bootup text. Making it easier for board with SPD DIMM's to see,
if ECC is enabled or not.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:19 +02:00
Stefan Roese
dee40d26d3 arm: mvebu: Enable USB EHCI support on Armada XP
This patch enables the USB EHCI support for the Marvell Armada XP (AXP)
SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure
the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done
this already in the bin_hdr (SPL U-Boot). Without this, accessing the
controller registers in U-Boot or Linux will hang the CPU.

Additionally, the AXP uses a different USB EHCI base address. This
patch also takes care of this by runtime SoC detection in the Marvell
EHCI driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:07 +02:00
Stefan Roese
2a0b7dc3b6 arm: mvebu: Enable NAND controller on MVEBU SoC's
This patch enables the NAND controller on the Armada XP/38x and provides
a new function that returns the NAND controller input clock. This
function will be used by the MVEBU NAND driver.

As part of this patch, the multiple BIT macro definitions are moved
to a common place in soc.h.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:49:02 +02:00
Stefan Roese
501c098a1f arm: mvebu: Disable MBUS error propagation
Accessing MBUS windows not backed-up by e.g. PCIe devices will
hang the SoC. Disable MBUS error propagation back to CPU allows
to read 0xffffffff instead of hanging the SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:57 +02:00
Stefan Roese
2b181b5b04 arm: mvebu: Flush caches and disable MMU only on A38x
Only with disabled MMU its possible to switch the base register address
on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also
not accessible, as its still locked to cache.

So to fully release / unlock this area from cache, we need to first
flush all caches, then disable the MMU and disable the L2 cache.

On Armada XP this does not seem to be needed. Even worse, with this
code added, I sometimes see strange input charactes loss from the
console.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:52 +02:00
Stefan Roese
5b72dbfc23 arm: mvebu: Setup the MBUS bridge registers
With this patch, the MBUS bridge registers (base and size) are
configured upon each call to mbus_dt_setup_win(). This is needed, since
the board code can also call this function in later boot stages. As
done in the maxbcm board.

This is needed to fix a problem with the secondary CPU's not booting
in Linux on AXP.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peter Morrow <peter@senient.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:46 +02:00
Stefan Roese
8ed20d6501 arm: mvebu: Change MBUS base addresses and sizes
This patch changes the MBUS base addresses and sizes to use more
generic names and also adds defines for the sizes. It also moves
the base address to higher addresses.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:48:34 +02:00
Stefan Roese
8822fe1683 arm: mvebu/armada100: dram.c: Remove CONFIG_SYS_BOARD_DRAM_INIT
CONFIG_SYS_BOARD_DRAM_INIT is not defined anywhere. So lets get rid
of all references here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-08-17 18:41:33 +02:00
Stefan Roese
8ed43b966c arm: mvebu: Add SPL SDIO/MMC boot support
This patch adds basic SDIO/MMC booting support to MVEBU SoC's. Since
I don't know of a way to test the boot-device upon runtime, this patch
hardcodes the spl_boot_device instead.

Tested on Marvell DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Dirk Eibach <eibach@gdsys.de>
2015-07-24 09:45:30 +02:00
Stefan Roese
ad6ac7aa00 arm: mvebu: a38x: Use correct PEX register access macros
Remove the incorrect PEX macros from the DDR header. And insert the
correct ones in ctrl_pex.h instead.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:39:25 +02:00
Stefan Roese
ff9112df8b arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory
With the upcoming addition of the Armada 38x DDR support, which is not
compatible to the Armada XP DDR init code, we need to introduce a new
directory infrastructure. To support multiple Marvell DDR controller.

This will be the new structure:

     drivers/ddr/marvell/axp
     Supporting Armada XP (AXP) devices (and perhaps Armada 370)

     drivers/ddr/marvell/a38x
     Supporting Armada 38x devices (and perhaps Armada 39x)

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:30 +02:00
Stefan Roese
edb4702533 arm: mvebu: Add Armada 38x SERDES / PHY init code from Marvell bin_hdr
This code is ported from the Marvell bin_hdr code into mainline
SPL U-Boot. It needs to be executed very early so that the devices
connected to the serdes PHY are configured correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:14 +02:00
Stefan Roese
29b103c733 arm: mvebu: serdes: Move Armada XP SERDES / PHY init code into new directory
With the upcoming addition of the Armada 38x SPL support, which is not
compatible to the Armada XP SERDES init code, we need to introduce a new
directory infrastructure. So lets move the AXP serdes init code into
a new directory. This way the A38x code can be added in a clean way.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:38:05 +02:00
Stefan Roese
9f62b44ec7 arm: mvebu: Disable MMU before changing register base address
Only with disabled MMU its possible to switch the base register address on
Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not
accessible, as its still locked to cache.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:36 +02:00
Stefan Roese
e3cccf9eb2 arm: mvebu: spl.c: Add call to board_early_init_f()
Pin muxing needs to be done before UART output, since on A38x the UART
pins need some re-muxing for output to work.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:20 +02:00
Stefan Roese
21427708a6 arm: mvebu: Use default reg base address for SPL on A38x
On A38x switching the regs base address without running from
SDRAM doesn't seem to work. So let the SPL still use the
default base address and switch to the new address in the
mail u-boot later.

Signed-off-by: Stefan Roese <sr@denx.de>
2015-07-23 10:37:10 +02:00
Stefan Roese
ade741b389 arm: mvebu: Call timer_init early before PHY and DDR init
Without calling timer_init(), the xdelay() functions return immediately.
We need to call timer_init() early, so that these functions work and
the PHY and DDR init code works correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anton Schubert <anton.schubert@gmx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23 08:30:58 +02:00
Anton Schubert
e863f7f051 arm: mvebu: add Armada XP SATA support
This patch initializes the SATA address windows on Armada XP and
allows it to work with the existing mvsata_ide driver.
It also adds the necessary configuration for the db-mv784mp-gp board.

Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-23 08:30:58 +02:00
Stefan Roese
fe11ae2437 usb: Add EHCI support for Armada 38x (mvebu)
This patch adds USB EHCI host support for the common mvebu platform.
Including the Armada 38x.

Tested on DB-88F6280-GP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10 14:55:50 +02:00
Stefan Roese
4d991cb3c7 arm: mvebu: Add SATA/SCSI (AHCI) support for Armada A38x
This patch adds support for the common AHCI controller on the Marvell
Armada 38x.

Tested on the Marvell DB-88F6820-GP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10 14:55:50 +02:00
Stefan Roese
7f1adcd74f arm: mvebu: Add SDIO/SDHCI support for Armada A38x
Armada A38x implements an SDHCI compatible SDIO controller. This patch
enables the Marvell driver to support this SoC. And enables the
SDIO controller if selected by the board configuration.

Tested on Marvell DB-88F6820-GP board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-10 14:54:09 +02:00
Kevin Smith
e1b078e06c arm: mvebu: Update CBAR with SOC regs base
SMP-enabled Linux kernels read the CBAR register in CP15 to find
the address of the SCU registers.  After remapping internal
registers, also update the CBAR so the kernel can find them.

Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Acked-by: Stefan Roese <sr@denx.de>
2015-06-14 17:48:28 +02:00
Stefan Roese
5730360efc arm: mvebu: Disable L2 cache before enabling d-cache
L2 cache may still be enabled by the BootROM. We need to first disable
it before enabling d-cache support.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
2015-06-14 17:48:28 +02:00
Stefan Roese
2083db7a75 arm: mvebu: Remove "u-boot.kwb" CONFIG_BUILD_TARGET for non-SPL targets
By removing this default build target, the "u-boot.kwb" target is not
automatically generated. This fixes a temporary build error when using
out-of-tree builds, as buildman does per default (reported by Simon).

When the full SPL support is added for these targets with the DDR training
code, the "u-boot-spl.kwb" image will be generated automatically.

Users providing a special bin_hdr binary (binary.0) file can always add
this binary file and generate the full firmware image by issuing the
"make u-boot.kwb" command directly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-05-05 14:32:05 +02:00
Stefan Roese
60b75324ea arm: mvebu: Add d-cache invalidate before enabling the d-cache
This solves some RX problems that have been seen, when using the
mvneta ethernet driver. The cache needs to be reset into a "clean"
state before using it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:32:04 +02:00
Stefan Roese
e89bf8bcc9 arm: mvebu: Remove coherency configuration
We are not using the coherency feature in U-Boot at all. So lets remove
this configuration from the mbus driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:32:04 +02:00
Stefan Roese
cae9008f69 arm: mvebu: Change network init code to allow a more flexible setup
With the introduction of the Armada 38x support, its necessary to change
the mvneta ethernet driver init call from always 4 times to a
configurable value. Lets make this init call more flexible by moving
the actually used devices to the config header.

Additionally this patch takes care of the slightly different base
addresses for the ethernet controllers on A38x.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-05-05 14:31:49 +02:00
Stefan Roese
9c6d3b7b66 arm: mvebu: Add basic Armada 38x support
This patch adds support for the Marvell Armada 38x SoC family.

Supported peripherals are:
- UART
- Ethernet (mvneta)
- I2C
- SPI (including SPI NOR flash)

Tested on Marvell DB-88F6820-GP evaluation board.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
880b15a37b arm: mvebu: Move CONFIG_SPL_LDSCRIPT to common header
This way, new MVEBU boards don't need to specifiy the common location
for the SPL linker script.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
f7c0ef073d arm: mvebu: Only define MV88F78X60 for Armada XP
This define is used by the DDR training code for Armada XP. With the
upcoming addition of Armada 38x support, lets only define it for
Armada XP in this common header.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
8402b69b7e arm: mvebu: Remove unreferenced define
MAX_MVNETA_DEVS is not used anywhere in U-Boot. So lets remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
250eea74b9 arm: mvebu: Change header macros from ARMADA_XP to MVEBU
Since these files will be used for other MVEBU SoC's, lets reflect this
in the headers marcos as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
d078765640 arm: mvebu: Move mvebu-common into mach-mvebu
Now that the mach-mvebu directory exists and is used by Armada XP we can
move the mvebu-common files into this directory as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
8cb7872230 arm: armada-xp: Move SoC headers to mach-mvebu/include/mach
Move arch/arm/include/asm/arch-armada-xp/*
     -> arch/arm/mach-mvebu/include/mach/*

Additionally the SYS_SOC is renamed from "armada-xp" to "mvebu". With this
change all these files can better be shared with other, newer Mavell
MVEBU SoC's. Like the upcoming Armada 38x support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00
Stefan Roese
350b50eea3 arm: armada-xp: Move SoC sources to mach-mvebu
Move arch/arm/cpu/armv7armada-xp/* -> arch/arm/mach-mvebu/*

Since this platform will be extended to support other Marvell SoC's as
well, lets rename it directly to mvebu.

This will be used by the upcoming Armada 38x suport (A38x).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Tested-by: Dirk Eibach <dirk.eibach@gdsys.cc>
2015-05-05 14:28:29 +02:00