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654 commits

Author SHA1 Message Date
Simon Glass
2444dae587 rockchip: Add core SoC start-up code 
Add code for starting up U-Boot SPL and U-Boot proper. This is generic and
makes use of devices provided by the board- or SoC-specific code.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2015-09-02 21:28:24 -06:00
Simon Glass
5ff093ab9e rockchip: rk3288: Add SDRAM init 
Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses
device tree for configuration so should be able to support other RAM
configurations. It may be possible to generalise the code to support other
SoCs at some point.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2015-09-02 21:28:24 -06:00
Simon Glass
13d80ff5af rockchip: rk3288: Add a simple syscon driver 
Add a driver that provides access to system controllers.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2015-09-02 21:28:24 -06:00
Simon Glass
3c5d0e34f6 rockchip: rk3288: Add SoC reset driver 
We can reset the SoC using some CRU (clock/reset unit) registers. Add support
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
 2015-09-02 21:28:24 -06:00