A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
With more text coming to the rockchip.rst document,
give it a restyle first.
Changed:
sort build examples alphabetically
add git clone example
fix bash examples
fix phrases (grammer)
fix typos
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit adds the default configuration file and
relevant description for a MK808 board.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add driver supporting pin multiplexing on rk3066 platform.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the clock driver for the rk3066 platform.
Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
SDRAM clock configuration.
The boot devices NAND, EMMC, SDMMC, SPI.
A UART for the debug messages (fixed) at 115200n8.
A SARADC for the recovery button.
A TIMER for the delays (fixed).
There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.
After the clock tree is set during the TPL probe
there's no parent update support.
In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.
The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
grf is needed by various drivers for rk3066 soc.
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip serial driver depends on an enabled NS16550 driver,
so add select SYS_NS16550 to config ROCKCHIP_SERIAL.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When a defconfig for rk3288 is compiled it gives the warning:
rockchip_rk3288_uart: Missing .compatible in
./drivers/serial/serial_rockchip.c
: WARNING: the driver rockchip_rk3288_uart
was not found in the driver list
Fix by renaming U_BOOT_DRIVER name of serial_rockchip.c
to rockchip_uart. Add rk3288 serial support with
a DM_DRIVER_ALIAS define.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip uart DT nodes have "snps,dw-apb-uart" as
fall back string. The driver ns16550.c has CONFIG_IS_ENABLED(OF_REAL)
as condition to of_match and does not copy dtplat data.
For TPL/SPL the driver serial_rockchip.c
is used. Move driver alias to correct driver.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The ns16550.c driver has the following conditions for .of_match:
CONFIG_IS_ENABLED(OF_REAL)
For Rockchip SoCs with TPL/SPL and platform data that need serial
support the serial_rockchip.c driver was made. It copies this data
and then calls ns16550_serial_probe(). With the addition of yet an other
SoC type this driver is in need for a little restyle.
Simplify struct rockchip_uart_plat and add extra SoCs with
DM_DRIVER_ALIAS(). Return -ENODEV when the ns16550.c driver
probe function is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have MMC DT nodes
with as compatible string "rockchip,rk2928-dw-mshc".
Add OF_PLATDATA support to the existing driver with
help of a DM_DRIVER_ALIAS.
This type needs a permanent enabled fifo.
The other Rockchip SoCs always have the property
"u-boot,spl-fifo-mode" in the MMC DT nodes,
because MMC to SRAM can't do DMA.
Make this property a requirement for MMC OF_PLATDATA
structures. The property "fifo-mode" must be added
for all other compile modes.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
In the rockchip_dw_mmc driver the clock name in use was "fixed"
to "ciu" with index 1, but later reverted back to index 0.
The clock drivers can handle both, but the calling driver
should submit correct data as a standard practice.
Fix the "ciu" clock index by setting it back to 1.
clock-names:
minItems: 2
items:
- const: biu
- const: ciu
- const: ciu-drive
- const: ciu-sample
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The line with .of_to_plat in the U_BOOT_DRIVER structure
of dw-apb-timer.c is not aligned with the rest.
Add an extra TAB to fix the whitespace.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Include SCSI in the list of boot targets if CONFIG_CMD_SCSI is
enabled.
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the HCLK_OTG, HCLK_SFC, and SCLK_SFC clocks to px30_clk_enable.
Without this change U-Boot reports an error of "Enable
clock-controller@ff2b0000 failed" on boot when using the SFC or USB in
U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mirroring commit 97ab802aa3 ("adc: meson-saradc: add support for
getting reference voltage value") for meson-saradc, this adds support
for getting the "vref-supply" regulator and register it as the ADC's
reference voltage regulator, so clients can translate sampled ADC values
to voltage.
Signed-off-by: Peter Cai <peter@typeblog.net>
Reviewed-by: John Keeping <john@metanate.com>
Tested-by: John Keeping <john@metanate.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A pointer can not be negative. Use macro IS_ERR_OR_NULL() for checking.
Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.
[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]
To make addressing the problem of migrated symbols being present in
board config header files, update the CI test to them print what symbols
are causing it to fail. Also report all failures in the tree, rather
than stopping at the first failing file.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
support, LED cleanups and support for default-state, increase malloc
pool on sandbox, ubifs bugfix, further serial cleanup / semihost
support, fix a few cases around enabling/disabling FS support in SPL,
clean up duplication of table_compute_checksum()
