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7 commits

Author SHA1 Message Date
Masahiro Yamada
1221ce459d treewide: replace #include <asm/errno.h> with <linux/errno.h>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-23 17:55:42 -04:00
Gerlando Falauto
9c134e189a arm/km: introduce kmsugp1 target
KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA.
The only difference is that the PCIe reset is connected to Kirkwood pin
MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7.
Such pin should theoretically be handled by the PCIe subsystem
automatically, but this turned out not to be the case.
So simply configure this PIN as a GPIO and issue a pulse manually.

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Karlheinz Jerg <karlheinz.jerg@keymile.com>
Cc: Valentin Longchamp <valenting.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2014-02-13 17:45:36 +01:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Wolfgang Denk
3fe63839f3 Minor Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10 09:18:33 +02:00
Valentin Longchamp
dbdee4ca59 arm/km: support the 2 PCIe fpga resets
The PCIe FPGAs now have to support 2 resets: one for the non traffic
affecting part (PCIe) and one for the traffic affecting part.

When the FPGA is not reconfigured, we only reset the PCIe part.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2012-07-07 14:07:37 +02:00
Valentin Longchamp
bcac5b1b2c arm/km: skip FPGA config when already configured
In order to be able to perform board resets without interrupting the
traffic, the configuration of an already properly configured FPGA is
skipped.

This is because some PCIe FPGAs embed some other function that must
continue to work over reset.

It is then the responsibility of the application to trigger a
reconfiguration when needed. This is done by lowering the FPGA_INIT_B
pin for delaying the configuration to u-boot @ next reboot, and then
lower the FPGA_PROGRAM_B signal.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2012-07-07 14:07:37 +02:00
Valentin Longchamp
b37f772433 arm/km: enable BOCO2 FPGA download support
This adds a first support of the FPGA download for a PCIe FPGA based
on the BOCO2 CPLD.

This takes place in 3 steps, all done accessing the SPICTRL reg of the
BOCO2:
1) start the FPGA config with an access to the FPGA_PROG bit
2) later in the boot sequence, wait for the FPGA_DONE bit to toggle to 1
   for the end of the FPGA configuration (with a timeout)
3) reset the FPGA
4) finally remove the access to its config EEPROM from the FPGA so that
   the CPU can update the FPGA configuration when the kernel is running

The boards with a PCIe FPGA but without BOCO2 still are supported.

The config option name is CONFIG_KM_FPGA_CONFIG

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
2012-07-07 14:07:37 +02:00