Commit graph

6968 commits

Author SHA1 Message Date
Simon Glass
8e6cc46178 dm: test: Add a test for the mmc uclass
Add a test to confirm that we can probe this device. Since there is no
MMC stack support in sandbox at present, this is as far as the test goes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
64ce0cad9e dm: test: Add a test for the ram uclass
Add a test to confirm that we can probe this device and get information on
the available RAM.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:32 -06:00
Simon Glass
5010d98f02 sandbox: Use the reset driver to handle reset
Move sandbox over to use the reset uclass for reset, instead of a direct
call to do_reset(). This allows us to add tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
b9d33fa06c sandbox: Add a warm and cold reset driver
Add drivers for sandbox. One can only perform a warm reset (which does
nothing). The other can perform a cold reset or a power reset (the
latter will quit U-Boot). These can be used for testing the reset uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
1704d083b3 dm: reset: Allow reset_walk() to return
Add a new reset_walk_halt() function to cause a reset and then halt on
failure. The reset_walk() function returns an error code.

This is needed for testing since otherwise U-Boot will halt in the middle
of a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:31 -06:00
Simon Glass
6a1c7cef14 dm: test: Add tests for the clk uclass
Add tests of each API call using a sandbox clock device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:30 -06:00
Simon Glass
e15bb3e63c power: pmic: Use trailing_strtol() instead of a local function
Use the common function to obtain the number from the end of the string,
instead of a local function. Also tweak the position of a debug() statement.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:30 -06:00
Simon Glass
f26c8a8e77 dm: Add a clock uclass
Clocks are an important feature of platforms and have become increasing
complex with time. Most modern SoCs have multiple PLLs and dozens of clock
dividers which distribute clocks to on-chip peripherals.

Some SoC implementations have a clock API which is private to that SoC family,
e.g. Tegra and Exynos. This is useful but it would be better to have a
common API that can be understood and used throughout U-Boot.

Add a simple clock API as a starting point. It supports querying and setting
the rate of a clock. Each clock is a device. To reduce memory and processing
overhead the concept of peripheral clocks is provided. These do not need to
be explicit devices - it is possible to write a driver that can adjust the
I2C clock (for example) without an explicit I2C clock device. This can
dramatically reduce the number of devices (and associated overhead) in a
complex SoC.

Clocks are referenced by a number, and it is expected that SoCs will define
that numbering themselves via an enum.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
f9917454d5 dm: Add a system reset uclass
It is common for system reset to be available at multiple levels in modern
hardware. For example, an SoC may provide a reset option, and a board may
provide its own reset for reasons of security or thoroughness. It is useful
to be able to model this hardware without hard-coding the behaviour in the
SoC or board. Also there is a distinction sometimes between resetting just
the CPU (leaving GPIO state alone) and resetting all the PMICs, just cutting
power.

To achieve this, add a simple system reset uclass. It allows multiple devices
to provide reset functionality and provides a way to walk through them,
requesting a particular reset type until is it provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:29 -06:00
Simon Glass
6e780c7a7b ns16550: Improve debug UART so it can work with 32-bit access
Since Rockchip requires 32-bit serial access, add this to the driver.
Refactor a little to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:28 -06:00
Simon Glass
6f849c3012 dm: spi: Make local functions static
Several functions in this file should be marked as static. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:27 -06:00
Simon Glass
6c51df6859 dm: Add support for RAM drivers
Add support for a driver which sets up DRAM and can return information about
the amount of RAM available. This is a first step towards moving RAM init
to driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:27 -06:00
Simon Glass
6c69c7fb57 dm: pmic: Add functions to adjust PMIC registers
It is a common requirement to update some PMIC registers. Provide some
simple convenience functions to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:27 -06:00
Simon Glass
59c26a9c22 dm: power: Use debug() for errors in regulator uclass
To reduce unnecessary code size in an uncommon code path, use debug()
where possible(). The driver returns an error which indicates failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
083fc83a4e dm: power: Add a function to set up all regulators
The device tree provides information about which regulators should be
on at boot, or always on. Use this to set them up automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
3b55d30f6f dm: pmic: Split output from function
The regulator_autoset() function mixes printf() output and PMIC adjustment
code. It provides a boolean to control the output. It is better to avoid
missing logic and output, and this permits a smaller SPL code size. So
split the output into a separate function.

Also rename the function to have a by_name() suffix, since we would like
to be able to pass a device when we know it, and thus avoid the name
search.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
7837ceab1e dm: power: Add regulator flags to centralise auto-set logic
Decide when the regulator is set up whether we want to auto-set the voltage
or current. This avoids the complex logic spilling into the processing code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:26 -06:00
Simon Glass
23ec2b570d dm: power: Avoid case-insensitve match for child names
This is not user input (i.e. from the command line). It should be possible
to get the case correct and avoid the case-insensitive match. This will
help avoid sloppy device tree setups.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-07-21 17:39:25 -06:00
Simon Glass
1169299135 mmc: Add debug() output on read errors
Allow read errors to be diagnosed more easily.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Simon Glass
e7ecf7cb5a dm: mmc: Add an MMC uclass
Add basic support for MMC, providing a uclass which can set up an MMC
device. This allows MMC drivers to move to using driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:25 -06:00
Simon Glass
5ac76bad22 dm: led: Add a driver for GPIO-controlled LEDs
Add a simple driver which allows use of LEDs attached to GPIOs. The linux
device tree binding is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
5917112c9e dm: Add support for LEDs
Add a simple uclass for LEDs, so that these can be controlled by the device
tree and activated when needed. LEDs are referred to by their label.

This implementation requires a driver for each type of LED (e.g GPIO, I2C).

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
5725128507 dm: Add support for generic system controllers (syscon)
Many SoCs have a number of system controllers which are dealt with as a
group by a single driver. It is a pain to have to add lots of compatible
strings and/or separate drivers for each. Instead we can identify the
controllers by a number and request the address of the one we want.

Add a simple implementation of this which can be used by SoC driver code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:24 -06:00
Simon Glass
6f98b7504f dm: Add support for register maps (regmap)
Add a simple implementaton of register maps, supporting only direct I/O
for now. This can be enhanced later to support buses which have registers,
such as I2C, SPI and PCI.

It allows drivers which can operate with multiple buses to avoid dealing
with the particulars of register access on that bus.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
efa677fb48 dm: gpio: Add dm_gpio_request() to manually request a GPIO
This function can be used for testing to manually request a GPIO for use,
without resorting to the legacy GPIO API.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
32ec159844 dm: gpio: Add dm_gpio_lookup_name() to look up a GPIO name
Provide a driver-model function to look up a GPIO name. Make the standard
function use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
ce22c5bbee dm: gpio: Allow GPIO uclass to be used in SPL
Now that we support driver model in SPL, allow GPIO drivers to be used there
also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
132f9bfc9e dm: core: Correct device_get_child_by_of_offset() parameter
This parameter is named 'seq' but should be named 'of_offset'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:23 -06:00
Simon Glass
2693047acd dm: core: Add a function to find any device from device tree
In some rare cases it is useful to be able to locate a device given a device
tree node offset. An example is when you have an alias that points to a node
and you want to find the associated device. The device may be SPI, MMC or
something else, but you don't need to know the uclass to find it.

Add a function to do a global search for a device, given its device tree
offset.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:22 -06:00
Simon Glass
3039811e65 dm: core: Use debug() instead of printf() for failures
To avoid bloating SPL code, use debug() where possible in the driver model
core code. The error code is already returned, and can be investigated as
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:22 -06:00
Simon Glass
304fbef156 dm: Move the tree/uclass dump code into its own file
In SPL it is sometimes useful to be able to obtain a dump of the current
driver model state. Since commands are not available, provide a way to
directly call the functions to output this information.

Adjust the existing commands to use these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-07-21 17:39:22 -06:00
Tom Rini
b217c89e85 Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-07-20 17:12:52 -04:00
Prabhakar Kushwaha
56c57cf7e9 driver/ldpaa_eth:Avoid infinite loop in ldpaa_eth_rx
Change infinite loop mechanism to timer based polling for QBMAN release in
ldpaa_eth_rx.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
0c7c87a4ac driver/ldpaa_eth: Avoid TX conf frames
Polling of TX conf frames is not a mandatory option.
Packets can be transferred via WRIOP without TX conf frame.

Configure ldpaa_eth driver to use TX path without confirmation frame

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
b4c3a35dc0 driver/ldpaa_eth: Add timeout handling DQRR entry read
Volatile command does not return frame immidiately, need to wait till a frame
is available in DQRR. Ideally it should be a blocking call.

Add timeout handling for DQRR frame instead of retry counter.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
e48df52b69 driver/ldpaa_eth: Retry enqueue if portal was busy
Do not immediately return if the enqueue function returns -EBUSY; re-try
mulitple times.

if timeout occures, release the buffer.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Stuart Yoder
70e52d2115 armv8/fsl-lsch3: device tree fixups for PCI stream IDs
This patch adds the infrastructure to update device
tree nodes to convey SMMU stream IDs in the device
tree.  Fixups are implemented for PCI controllers
initially.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Stuart Yoder
21c6987067 drivers/fsl-mc: dynamically create ICID pool in DPC
delete any existing ICID pools in the DPC and create
a new one based on the stream ID partitioning for
the SoC

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Stuart Yoder
39da644ea8 armv8/fsl-lsch3: partition stream IDs
Stream IDs on ls2085a devices are not hardwired and are
programmed by sw.  There are a limited number of stream IDs
available, and the partitioning of them is scenario dependent.
This header defines the partitioning between legacy, PCI,
and DPAA2 devices.

Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
2b7c4a1983 drivers: fsl-mc: Return error for major version mismatch
Management complex major version should match to the firmware present in flash.

Return error during mismatch of major version.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:37 -07:00
Prabhakar Kushwaha
cd8aefc076 drivers: fsl-mc: Update qbman driver
Update qbman driver
 - As per latest available qbman driver
 - Use of atomic APIs

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Geoff Thorpe <Geoff.Thorpe@freescale.com>
CC: Haiying Wang <Haiying.Wang@freescale.com>
CC: Roy Pledge <Roy.Pledge@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
Prabhakar Kushwaha
1f1c25c745 drivers: fsl-mc: Update flibs to mc-0.6.0.1
Update flibs changes to mc-0.6.0.1 for dpmang, dprc, dpni and dpio objects
Also rename qbman_portal_ce/ci_paddr to qbman_portal_ce/ci_offset in
dpio_attr. These are now offsets from the SoC QBMan portals base.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
J. German Rivera
c1000c12d3 drivers/fsl-mc: Autoload AOIP image from NOR flash
Load AIOP image from NOR flash into DDR so that the MC firmware
the MC fw can start it at boot time

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
Prabhakar Kushwaha
e247db4fad driver/ldpaa_eth:Flush buffer before seeding BMAN after TX_conf
Flush buffer before releasing to BMan after TX_conf to ensure, the core does
not have any cachelines that the WRIOP will DMA to.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
J. German Rivera
cc088c3ac6 drivers/fsl-mc: Make MC boot error messages more readable
Make it easier for the user to notice when the MC firmware
had problems booting.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:36 -07:00
Bhupesh Sharma
dbe94dd11c driver/fsl_debug_server: Fix the DDR hide logic for LS2085a
This patch fixes the DDR hide logic for LS2085a, correcting the way
the Debug Server FW and MC FW images are placed on the top of system
DDR and how the rest of the system DDR space is made visibile to Linux.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-07-20 11:44:35 -07:00
York Sun
b92557cd3f driver/ddr/fsl: Add a hook to update SPD address
In case SPD address changes between board revisions, updating SPD
address can be called from board file.

Signed-off-by: York Sun <yorksun at freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
2015-07-20 11:44:35 -07:00
Haikun Wang
b1d9e46a0b fdt: armv8: Fix build warnings on armv8
Fix below build warnings on armv8,
drivers/spi/fsl_dspi.c: In function ‘fsl_dspi_ofdata_to_platdata’:
drivers/spi/fsl_dspi.c:667:2:
warning: format ‘%x’ expects argument of type ‘unsigned int’,
	but argument 2 has type ‘fdt_addr_t’ [-Wformat=]
debug("DSPI: regs=0x%x, max-frequency=%d, endianess=%s, num-cs=%d\n",
		    ^
lib/fdtdec.c: In function ‘fdtdec_get_addr_size’:
lib/fdtdec.c:105:4:
warning: format ‘%lx’ expects argument of type ‘long unsigned int’,
but argument 3 has type ‘fdt_size_t’ [-Wformat=]
debug("addr=%08lx, size=%08lx\n",
			    ^

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-20 07:21:47 -06:00
Tom Rini
605e15db2b Merge git://git.denx.de/u-boot-x86 2015-07-15 10:41:20 -04:00
Bin Meng
f110da9984 pci: Disable expansion ROM address decoding when signature check fails
We should not leave the expansion ROM address window open when there
is not a valid ROM.

Suggested-by: Matt Porter <mporter@konsulko.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-07-14 18:03:20 -06:00