Add trivial reset driver extension to the CPG clock driver. The change
turns current CPG UCLASS_CLK driver instance into an UCLASS_NOP proxy
driver, which in turn binds both generic rcar3_clk UCLASS_CLK clock
driver as well as generic rcar_rst UCLASS_RESET reset driver to the
CPG DT node. This way, any other drivers which use the 'reset' DT
property can now obtain valid reset handle backed by a reset driver.
The clock tables have been updated to represent the CPG driver and only
implement the generic CPG proxy driver bind call, which binds the clock
and reset drivers.
The DM_RESET is now enabled for all R-Car Gen3 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The MODEMR register offset changed on R8A779A0, make the MODEMR offset
configurable. Fill the offset in on all clock drivers. No functional
change.
Based off "clk: renesas: Make CPG Reset MODEMR offset accessible from
struct cpg_mssr_info" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The clock driver used a heavy-handed approach where it turned off
all available clocks, while also possibly setting bits which are not
documented in the R-Car datasheet. Update the tables so that only
the bits which are documented are set or cleared when tearing down
the clock driver.
Note that the only clock left running before booting Linux are now
MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.
Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
