Enable usage of gdbserver for all sandbox targets (sandbox,
sandbox_flattree etc.).
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We use TARGET_BCM63158 in the Kconfig instead of ARCH_BCM63158,
so we could add other board that use a bcm63158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Release cluster block immediately when no longer use would help to reduce
64KiB memory allocated to the memory pool.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Drop the statically allocated get_contents_vfatname_block and
dynamically allocate a buffer only if required. This saves
64KiB of memory.
Signed-off-by: Stefan Agner <stefan.ag...@toradex.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
SPL currently does not check uImage CRCs when loading U-Boot.
This patch adds checking the uImage CRC when SPL loads U-Boot. It does
this by reusing the existing config option SPL_CRC32_SUPPORT to allow
leaving out the CRC check on boards where the additional code size or
boot time is a problem (adding the CRC check currently adds ~1.4 kByte
to flash).
The SPL_CRC32_SUPPORT config option now gets enabled by default if SPL
support for legacy images is enabled to check the CRC on all boards
that don't actively take countermeasures.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Arguments are const and belong to the caller. Calling date in a hush
loop will yield different results from the second invocation.
Signed-off-by: Roman Kapl <rka@sysgo.com>
Currently there are two problems in 'bootelf -p' (load elf by segments)
command:
- bss section is not flushed, so booted elf can have non zero values
in bss;
- at least on ARM there are 'CACHE: Misaligned operation at
range...' warnings
Use p_memsz instead of p_filesz during cache flushing for elf segment.
p_filesz doesn't include zero initialized memory (e.g. bss section),
which also should be flushed.
Align these cache flushes to line boundaries.
Signed-off-by: Kurban Mallachiev <mallachiev@ispras.ru>
This commit converts the brxre1 board to DM,
for this we have todo following things:
- add a devicetree-file for this board
- drop all obsolete settings from board header-file
- use dm_i2c_xxx calls for read/write to the resetcontroller
- request gpios before operate them
Serues-cc: trini@konsulko.com
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Before the patch scsi would report the same device number for all SCSI
devices, e.g.
Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Device 0: (1:0) Vendor: ATA Prod.: Rev:
Type: Hard Disk
Capacity: not available
With the patch the same device number is reported as is used in
scsi_read():
Device 0: (1:0) Vendor: ATA Prod.: Crucial_CT128M55 Rev: MU01
Type: Hard Disk
Capacity: 122104.3 MB = 119.2 GB (250069680 x 512)
Device 1: (1:0) Vendor: ATA Prod.: Rev:
Type: Hard Disk
Capacity: not available
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When in pack_byte_string() memcpy() is called for size 0 the source buffer
address has no relevance. So we can use NULL here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1021a
defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls1021a defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1012afrwy
and ls1012afrwy defconfigs that missing one of them or more.
Support sata for all ls1012afrwy defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls208xardb
and ls208xaqds defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls208xa defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1088ardb
and ls1088aqds defconfigs that missing one of them or more.
Support sata for all ls1088a defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1046ardb
and ls1046aqds defconfigs that missing one of them or more.
enable CONFIG_DM_MMC for some defconfigs to support CONFIG_BLK
Support sata for all ls1046a defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_AHCI CONFIG_SATA_CEVA CONFIG_DM_SCSI for some ls1043aqds
defconfigs that missing one of them or more.
Support sata for all ls1043aqds defconfigs
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
remove SCSI and SCSI_AHCI configs for ls1043ardb due to no sata interface
support.
this changed is to fixed the ls1043ardb compile warning as fallows:
===================== WARNING ======================
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the
v2019.07 release. Failure to update by the deadline may
result in board removal.See doc/driver-model/MIGRATION.txt
for more info.
====================================================
Signed-off-by: Peng Ma <peng.ma@nxp.com>
[PK: reword the patch subject]
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig
for LS1088A and LS2088A platforms.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Due to the new layout of Layerscape series, move the QE
firmware to address (512*4A00) in SD Card.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
nand_bootcmd doest not exist, it should be support
for nand auto boot up.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
LX2160AQDS is a development board that supports LX2160A
family SoCs. This patch add base support for this board.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
[PK: Sqaush patch for "secure boot defconfig" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add init_func_vid() which calls adjust_vdd()
This ensures adjust_vdd() is called via
init_sequence_f[]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Adds esbc validate command for verification of MC and DPC
firmware, along with secure boot defconfig.
Also enable distro boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Peng Ma <peng.ma@nxp.com>
[PK: squash "enable DM support for SATA patch" & add maintainer]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
some dpmacs in armv8a based freescale layerscape SOCs can be
configured via both serdes(sgmii, xfi, xlaui etc) bits and via
EC*_PMUX(rgmii) bits in RCW.
e.g. dpmac 17 and 18 in LX2160A can be configured as SGMII from
serdes bits and as RGMII via EC1_PMUX/EC2_PMUX bits
Now if a dpmac is enabled by serdes bits then it takes precedence
over EC*_PMUX bits. i.e. in LX2160A if we select serdes protocol
that configures dpmac17 as SGMII and set the EC1_PMUX as RGMII,
then the dpmac is SGMII and not RGMII.
Therefore, move the fsl_rgmii_init after fsl_serdes_init. in
fsl_rgmii_init function of SOC, we will check if the dpmac is enabled
or not? if it is (fsl_serdes_init has already enabled the dpmac), then
don't enable it.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add code to initial ethernet interface arrays
with corresponding dpmac-id values in serdes_init function
for LX2160A.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
fsl_ddr_board_options is generally defined in board
board's ddr.c, but some boards like lx2160ardb board
does not need this function.
Defining fsl_ddr_board_options as weak function to
resolve compilation errors for such boards.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[PK: Fix checkpatch warnings]
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
As per hardware documentation,
CONFIG_SYS_FSL_PEBUF_BASE for lx2160a is 0x1c00000000
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
CONFIG_BLK can be safely enabled as DM_MMC and DM_USB are already enabled.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
Heinrich is going to take over maintainership of the efi_loader tree
going forward.
To ensure that I will still receive review mails at least, add me as
reviewer with a stable email address.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Matthias Brugger agreed to take over maintainership from me for the
Raspberry Pi tree. Add him to the MAINTAINERS file instead.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The commit 1bac199e8c ("configs: Resync with savedefconfig")
did remove ethernet driver from following boards defconfig:
- brppt1_mmc
- brppt1_nand
- brppt1_spi
With this commit we add ethernet and responsible phy support again.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
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Merge tag 'efi-2019-04-rc2' of https://github.com/xypron2/u-boot
The patches fix multiple errors. Mentionable are:
- EFI unit tests (bootefi selftest) can run on i386.
- `make tests` executes the Unicode unit tests.
The LoadImage patch is preparing for further rework to be delivered
in v2019.07.
This patch prevent the Stratix 10 FPGA driver incorrectly return the
transaction ID as the mailbox error code. It should always return the
actual mailbox error code from SDM firmware.
Signed-off-by: Ang, Chee Hong <chee.hong.ang@intel.com>
Poll for iDMAC TX/RX interrupt before disable DMA.
This to prevent disable DMA before data is transfer
completed.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
The 'dwmac_socfpga' ETH driver can now get the MACs out of reset
via the socfpga reset driver and can set PHY mode via syscon.
This means we can now remove the ad-hoc code to do this from
arch/arm/mach-socfpga.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.
This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This driver was written for Arria10, but it applies to Gen5, too.
The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.
This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.
Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.
To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.
Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
As the H5 is pin compatible with the H3, vendors tend to upgrade their
existing H3 products with an H5 SoC swap. This is the case with the
Bananapi M2+ H5.
Add the following to support it:
- device tree file: synced from Linux v5.0-rc1,
- defconfig: copy of bananapi_m2_plus_h3_defconfig with only SoC
family and default device tree file name changed
- MAINTAINERS entry
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
The brand Sinovoip is used for Sinovoip's original VOIP products, while
the Bananapi brand is for the single board computers they produce. This
has been verified by Bananapi. Rename the board from "Sinovoip BPI M2
Plus" to "Bananapi M2 Plus". For the defconfig file, all lowercase is
used.
To support the H5 variant of this board, the "H3" suffix is added to
the defconfig name.
Also add myself as one of the board maintainers.
As the device tree files were already correctly named, they do not
require any changes.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[jagan: removed unneeded message from commit body]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
