This code is only used in 32-bit mode. Move it so that it does not get
built with 64-bit U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To avoid using BSS in SPL before SDRAM is set up, move this field to
global_data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a rough function to handle jumping from 32-bit SPL to 64-bit U-Boot.
This still needs work to clean it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some files cannot be built with 64-bit and mostly don't make sense in that
context. Disable them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are currently not supported. Calling 64-bit code from 64-bit U-Boot is
much simpler, so this code is not needed. setjmp() is not yet implemented for
64-bit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't support SDRAM init in 64-bit mode since it is essentially
impossible to get into that mode before SDRAM set up. Provide dummy functions
for now. At some point we will need to pass the SDRAM parameters through from
SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If SPL is used it is always build in 32-bit mode. Add a link script to
handle the correct placement of the sections.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This needs a different image format from 32-bit x86, so add a new link
script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When SPL and U-Boot proper have different settings for this flag, we need to
use the correct one. Fix this up in the interrupt code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this is just an ordinary variable. We may consider making it a
fixed register in the future.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is not much needed at present, but set up a separate directory to put
this code as it grows.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Much of the cpu and interrupt code cannot be compiled on 64-bit x86. Move it
into its own directory and build it only in 32-bit mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add code to start up U-Boot in 64-bit mode. It is fairly simple since we are
running from RAM and SPL has done the low-level init.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the Makefile so that some 32-bit init can be built into SPL rather
than U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use this new option to control the location of 32-bit init. This will allow
us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use this new option to control the location of 16-bit init. This will allow
us to place this in SPL if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add various debug() messages in places where errors occur. This aids with
debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We should use unsigned long rather than u32 for addresses. Update this so
that the table-generation code builds correctly on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These files now need to be in a standard place so that they can be located
by generic Makefile rules. Move them to the 'lib' directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Highlights this time around:
- Add run time service (power control) support for PSCI (fixed in v3)
- Add efi gop pointer exposure
- SMBIOS support for EFI (on ARM)
- efi pool memory unmap support (needed for 4.8)
- initial x86 efi payload support (fixed up in v2)
- various bug fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYBx6vAAoJECszeR4D/txgiNwQAJAcdx7m54D+c3juXR3wT3WR
9A0NIkyY9M/lwdG8MRZubaXV6b7s1iZhROvEGN6sZVKe+hR+c8KWbjNC34i/Mzd2
SLFTax+EWiNogSwPxBUG4R5rpPb4UFDreG9ava7L2A07E/zmXlOTJMj8YBPWKUMf
FltmpLFm4lBpm5l/e47f1hotUnRcvwr44dp09G4hjYGh8cdusHeKebwlkyCPhhH7
GwYDI4Reg8dHQqbKNSPaAeK97zE30H+w6kzF4DH1Dl4W9gI9fIlJC3XVajt9qoDz
8CLAMr4ptqnYZlVq+LYPpNDFG9Pkpb78ksCBmolbs/xSo9Nd0s0WRQA6Jvg5oSpu
aVDTJW3qWs3I1zfIDb0maX0yKer8QAm3D99zURxoyjALjNIS4++Tpa6TbgH/KvoQ
Si+ExfGc+MsWFS9K2FMp6ukDhuPypirRF5VsliSXK7kwg2QWQ2DMS9LLgabK3y2e
RxURzy9SJZf6NL7bUmCxvqdQd+S0+5sLJuc8n5sobiBRkvpmABHSelKKDg87C9OW
IYDNI4iHZ1hJZb37Z2LO7R+PAUIX+vbRitnzWSXfXGNstR0Q48I4Lg2Ud1j7xkr2
+uUB0wqbAksaRnDfNNod6hNqBmgueJFK9eVvE2PP1Pl6B83sc6yBDgMNjngQ6hia
7nv3bhAqrnMTPoQkN7C+
=peNm
-----END PGP SIGNATURE-----
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2016-10-19
Highlights this time around:
- Add run time service (power control) support for PSCI (fixed in v3)
- Add efi gop pointer exposure
- SMBIOS support for EFI (on ARM)
- efi pool memory unmap support (needed for 4.8)
- initial x86 efi payload support (fixed up in v2)
- various bug fixes
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
include/tables_csum.h
Add the required pieces to support the EFI loader on x86.
Since U-Boot only builds for 32-bit on x86, only a 32-bit EFI application
is supported. If a 64-bit kernel must be booted, U-Boot supports this
directly using FIT (see doc/uImage.FIT/kernel.its). U-Boot can act as a
payload for both 32-bit and 64-bit EFI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The CPU udevice already has a few callbacks to retreive information
about the currently running CPUs. This patch adds a new get_vendor()
call that returns the vendor of the main CPUs.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For SMBIOS tables we need to know the CPU family as well as CPU IDs. This
patches allocates some space for them in the cpu device and populates it
on x86.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bring in these functions from Linux v4.4. They will be needed for EFI loader
support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.
This applies the following upstream commits by
Thierry Reding <treding@nvidia.com> :
604e61e fdt: Add functions to retrieve strings
8702bd1 fdt: Add a function to get the index of a string
2218387 fdt: Add a function to count strings
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix the hex case and remove unused brackets. Use ~0U instead of ~0UL to
allow compilation on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present pch_power_options() has the arguments to writel() around the
wrong way. Fix this and update it to compile on 64-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the samus driver to avoid the direct call to the video BIOS setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With this addition, the eMMC device available on the congatec and DFI
BayTrail SoM is detected correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch_cpu_init() can be simpler by this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Generally the microcode is combined into a single block only (and removed
from the device tree) when there are multiple blocks. But this is not a
requirement.
Adjust the ivybridge code to avoid assuming this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a debug() at this point to help figure out what is wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To support the BayTrail internal SIO HS UART, the internal UART clock
needs to get configured. This patch adds support for this clock
configuration which will be done, if the PCI device(s) are found.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the change to set up pinctrl after relocation, link fails to boot. Add
a special case in the link code to handle this.
Fixes: d8906c1f (x86: Probe pinctrl driver in cpu_init_r())
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This introduces quark-specific ACPI global NVS structure, defined in
both C header file and ASL file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This introduces baytrail-specific ACPI global NVS structure, defined in
both C header file and ASL file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are quite a number of BayTrail boards that uses an external
SuperIO chipset to provide the legacy UART. For such cases, it's
better to have a Kconfig option to enable the internal UART.
So far BayleyBay and MinnowMax boards are using internal UART as
the U-Boot console, enable this on these two boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
We have drivers for several more devices now, so drop the strings which are
no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
