Move this document and convert it to rST. Make minimal changes, enough
for it to build successfully.
Future patches will tidy this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create a new usage/fit directory which will house information about FIT.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
To quote the author:
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses to
aliased (not physically present) addresses are cached and wrong size is
returned.
This was discovered while working on a TI AM625 based board where cache
is normally enabled, see commit c02712a748 ("arm: mach-k3: Enable
dcache in SPL").
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.
This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a748 ("arm: mach-k3: Enable dcache in SPL").
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix the write to the HPRT register which treat W1C fields
as if they were mere RW. This leads to unintended clearing of such fields
This bug was found during the testing on Simics model. Referring to
specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
Databook (3.30a)"5.3.4.8 Host Port Control and Status Register (HPRT)", the
HPRT.PrtPwr is cleared by this mistake. In the Linux driver (contrary to
U-Boot), HPRT is always read using dwc2_read_hprt0 helper function which
clears W1C bits. So after write back those bits are zeroes.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Commands causing reset in some configs:
When bootflow scan is run, this will cause a UCLASS_BOOTDEV device to
be added as sibling of those UCLASS_BLK devices found in the search
chain defined in environment variable "boot_targets", until boot
succeeds from some device. This can happen automatically as part of
the default boot process on some boards (example: Rock Pi 4) depending
on the board configuration (DISTRO_DEFAULTS, BOOTSTD, BOOTCOMMAND,
etc.) because they have bootcmd=bootflow scan.
If boot doesn't succeed from any device, and usb is in boot_targets,
and an usb storage device is plugged to some usb port at boot time,
its UCLASS_MASS_STORAGE device will have a UCLASS_BOOTDEV device as
child, besides a UCLASS_BLK child.
If once the boot fails the user enters at the U-Boot shell prompt:
usb info
or
usb tree
The code in cmd/usb.c will eventually recurse into the UCLASS_BOOTDEV
device and pass a null usb_device pointer to usb_show_tree_graph() or
usb_show_info() (because it has no parent_priv_).
This causes a reset. The expected behaviour would be to ignore the
UCLASS_BOOTDEV device, continue listing the usb information and return
to the prompt.
Minimal test:
Another way to trigger this reset as a minimal test or on boards with
a different bootcmd would be:
- make sure "usb" is in environment variable boot_targets (might need
setenv boot_targets usb; and/or saveenv and reset), then, with a usb
storage device plugged to a usb port, run:
=> usb reset ; bootflow scan ; usb info
Solution:
Fix it (twice) by checking for null parent_priv_ and adding
UCLASS_BOOTDEV to the list of ignored class ids before the recursive
call.
This prevents the current particular problem with UCLASS_BOOTDEV, even
in case it ever gets some parent_priv_ struct which is not an
usb_device, despite being the child of a usb_device->dev. And it also
prevents possible future problems if other children are added to usb
devices that don't have parent_priv_ because they are not part of the
usb tree, just abstractions of functionality (like UCLASS_BLK and
UCLASS_BOOTDEV are now).
Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
dm_test_restore() is called after dm unit test is run.
But this function does not scan any nodes under /firmware since
it calls dm_scan_fdt().
This causes an issue. For instance, scmi_sandbox_agent device
will disappear after running 'ut dm scmi_sandbox_agent'.
So call dm_extended_scan() instead. This change will be coherent
with what dm_scan() and test_pre_run() does.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
DM_FLAG_PRE_RELOC flag is added into some drivers
by recent commits such as
1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC").
Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform
is too small, Developerbox will not boot due to lack of
heap memory.
This commit increases the size of heap memory.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Per GitHub Dependabot:
- Use setuptools 65.5.1 to avoid some DoS issue
- Use requests 2.31.0 to avoid leaking some proxy information
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At first SPI transfers, multiple chip selects can be
enabled simultaneously. This is due to chip select
polarity, which is not properly initialized for all
channels. This patch fixes the issue.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
The functions `psci_get_context_id` and `psci_get_target_pc`
are written in C, so the C compiler may clobber registers r0-r3.
Do not use these registers to save data across calls.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Use a variable (MKIMAGE_SIGN_PASSWORD) like already done for RSA to
allow the signing process to run in batch.
Signed-off-by: Stefano Babic <sbabic@denx.de>
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1
or LAN78XX_OTP_INDICATOR_2. In the case of matching the first one we
set offset to itself, and clang warns about this. Rework the logic so
that if sig is the second indicator we adjust the offset as today and if
it does not match the first indicator we return -EINVAL
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
If only FIT images are enabled and loading the FIT image fails,
spl_nor_load_image() should return an error instead of zero.
Without this patch:
>>SPL: board_init_r()
spl_init
Trying to boot from NOR
Unsupported OS image.. Jumping nevertheless..
image entry point: 0x0
With patch:
>>SPL: board_init_r()
spl_init
Trying to boot from NOR
SPL: failed to boot from all boot devices (err=-6)
.### ERROR ### Please RESET the board ###
Signed-off-by: Mario Kicherer <dev@kicherer.org>
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
[trini: Drop hunk changing disk/part.c as that breaks other users]
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
for SPL which is required to auto configure the PCIe devices.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Add kconfig options to enable NVME and PCI NVMe support in SPL
Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To quote the author:
Now that the nvmxip block driver is merged we can add on top
of it the platform code to use GPT and FWU metadata in the
Corstone1000.
But first, push 2 fixes that are needed to make all this work:
- move nvmxip header to include
- setup fwu metadata structures as packed (we have a 32bit
writer - Secure enclave Cortex-M0 and a 64bit reader host
Cortex-A35)
Enable the newest features: nvmxip, fwu-metadata and
gpt. Commands to print the partition info, gpt info
and fwu metadata will be available.
Adjust also env boot script the address of the
bootbank with the new gpt layout, and also remove
the not needed kernel address bank0 and bank1
and retrieve function that would test the bank flag
before and now we are getting the info from the fwu
metadata.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
We need to distinguish between boot banks and from which
partition to load the kernel+initramfs to memory.
For that, fetch the boot index, fetch the correspondent
partition, calculate the correct kernel address and
then set the env variable kernel_addr with that value.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
it is expected that the firmware that runs before
u-boot somehow provide the information of the bank
for now we will fetch the info from the metadata
since the Secure enclave is the one responsible for
this information.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Move header to include to allow external code
to get the internal bdev structures to access
block device operations.
as at it, just add the UCLASS_NVMXIP string
so we get the correct output in partitions
listing.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
The fwu metadata in the metadata partitions
should/are packed to guarantee that the info is
correct in all platforms. Also the size of them
are used to calculate the crc32 and that is important
to get it right.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
-----BEGIN PGP SIGNATURE-----
iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmSQKuMcHGV1Z2VuLmhy
aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyPpxCACtOlHioHbgs0BMclpT
5hqT/ey5utWmnaKauAjUptts8w80TJNDB9goCv1DZeuJeT3OI727y5L73oiOgBBk
eF5BUXHxFnB6ggwtF3DzhAbhw21RlN4Irr3n4J0DIwLMvzEkLuPvzKjbfK9QUmZ0
Cg/VBfJGhuQrZkCXlsuKfNh/ywWk9QmnLMLfMJkKbKrc9KQqXCtVBEHplZpvSPD7
z4nYAg1FAB9zPmbtzCYHMrv+Jnshhv77HAH4ZBXkPNfH9dDHKjfz5d9J7RApwBqv
JX1TWnqxI9Db7uTsVMlM9sMjYj+U0hC2QEK2K0Khb1TrtLD4DQNb8FKOx9QnjMnI
C9dP
=nuwQ
-----END PGP SIGNATURE-----
Merge tag 'u-boot-at91-fixes-2023.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-atmel fixes for the 2023.07 cycle:
This small fixes set includes one init fix for scmi clocks and a missing
gpio_request for pm9g45.
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
stm32mp: stm32prog: Add support of ENV partition type
config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
stm32: Add IWDG handling into PSCI suspend code
stm32: Fix OF_LIST on DHCOR
stm32: Add missing header for save_boot_params
stm32: Use __section(".data") with dot in the section name on DHSOM
stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
dts: stm32mp: alignment with v6.3
dts: stm32f769-disco: remove the dsi_host node
configs: stm32f746-disco: remove a useless comment
-----BEGIN PGP SIGNATURE-----
iQJPBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmSMTNQcHHBhdHJpY2Uu
Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/ptSGD/dzdWxKXztcRZZPkEhF
oHlxRRqvDTpHT5vOuIRg4rnVUQcFowdLFVbg/9wSqAO3ONdyHTnj7SZojyzGrMZM
3pKQJEhlYo0k0h76SQnXimhh2AfI/UupYRqGC7zGWD9joqY64H9Xj0VzP3pGF0TL
+rtZC6OqCzHwaaF2LqPwAdgf5orLi5OND8dXw7b5O7+ELilTqt6c6gr5SEZfcxAf
gP+0Ph/vXvB36DvK5twTqprm/KrHUxweUqEylfg2Tsy2+b15wPZLRi4iZl8NgDJg
c/2sHjvbwIFfdott/XXHCS56crknMTH0WIIEKhlhe0t8iQy08rVCdkZzaf5EoIz8
7m26Ev3rbBw2PCB15DoM3lSZMwZbpyVbVSPoU9oWDsVWHhjSIsboSZUIKsHYDkVa
ehnO4kBSdbL7lqdiqbQ+z3KeMFYRHw5sje+iM5DzA78OoS79qkIksgRaFPw/Xo17
YiRiOezYy5o83p9vo7txJEwQFkpBCvHqGhEqib1pJDfkQ7RpRy+9cQoXuVK+UsZy
8KWVosoM+5vzodPuEbdftpOri/ImToI1/rFW9fQ+uN+Frcqdw2llWLdlLMCXuJo0
nEGthTpJ8y35pYepHXln5WAW2iInNlins5ZMZ+i0IpYg6PjSMNxQE6482sn9RRD1
diQKLKrH9N5cu8OmjKkygo6N
=QJDl
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20230616' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
serial: stm32: Fixes to avoid suprious characters
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
stm32mp: stm32prog: Add support of ENV partition type
config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
stm32: Add IWDG handling into PSCI suspend code
stm32: Fix OF_LIST on DHCOR
stm32: Add missing header for save_boot_params
stm32: Use __section(".data") with dot in the section name on DHSOM
stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
dts: stm32mp: alignment with v6.3
dts: stm32f769-disco: remove the dsi_host node
configs: stm32f746-disco: remove a useless comment
To avoid spurious chars, BRR register must only be written when
USART is disabled.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
In case there is still chars from previous bootstage to transmit, wait
for TC (Transmission Complete) bit to be set which ensure that the last
data written in the USART_TDR has been transmitted out of the shift
register.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
The node has become useless, as described in the
commit 754815b854 ("video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.
Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros
for video interface bus types")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Because clock devices are initialized by the SCMI server, if
CONFIG_CLK_SCMI is defined.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
The '_' character is discouraged in the node name, this patch adds the
new prefix of regulator subnode, with the '-' character, in STM32MP1 driver
to support the new naming rule in Linux kernel device trees.
It is a preliminary patch before Linux device tree synchronization
for STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Change the default base for offset parsing with simple_strtoull(),
so offset in flashlayout is coded in base 10 by default, even if string
start with '0'. The Octal encoding is not supported. The base 16
is still supported when the '0x' header is detected.
This patch solves an unexpected parsing result when the address,
provided by decimal value is starting by 0, for example 0x4400 = 00017408
is a invalid with current code.
...
P 0x04 fsbl1 Binary mmc0 00017408 tf-a.stm32
....
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Avoid to ignore the OTP read/write error and transmits the error
to STM32CubeProgrammer.
Today the error is only displayed in log error:
so the user on HOST thinks the OTP operation is performed.
Reported-by: Mickael GARDET <m.gardet@overkiz.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: 75ea9e75931c ("stm32mp: stm32prog: add TEE support in stm32prog command")
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.
By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.
After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add a protection in misc bsec ops for request with null size.
For example OP-TEE error occurs when get_eth_nb() return 0 in
setup_mac_address() for unknown part number because U-Boot read 0 OTPs.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
