Commit graph

28 commits

Author SHA1 Message Date
Tom Rini
d4143373f1 global: Migrate CONFIG_X86_REFCODE_ADDR to CFG
Perform a simple rename of CONFIG_X86_REFCODE_ADDR to CFG_X86_REFCODE_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Tom Rini
fa2fd534b5 global: Migrate CONFIG_X86_MRC_ADDR to CFG
Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00
Simon Glass
00959d871c spl: x86: Correct the binman symbols for SPL
These symbols are incorrect, meaning that binman cannot find the
associated entry. This leads to errors like:

binman: Section '/binman/simple-bin': Symbol '_binman_spl_prop_size'
   in entry '/binman/simple-bin/u-boot-spl/u-boot-spl-nodtb':
   Entry 'spl' not found in list (mkimage,u-boot-spl-nodtb,
   u-boot-spl-bss-pad,u-boot-spl-dtb,u-boot-spl,u-boot-img,main-section)

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-02-22 10:05:44 -07:00
Simon Glass
cad7b6b251 x86: dts: Drop unused CONFIG_SPL
This cannot be used since the previous #elif has already dealt with SPL.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:10 +13:00
Simon Glass
cb88ec7cab x86: Make use of binman expanded entries
We don't need to spell out the separate pieces of U-Boot phase binaries
anymore. Revert to using the simple entry and let binman do the expansion
itself as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:09 +13:00
Simon Glass
653554b40a x86: Add support for private files
Some boards need to include binary data into the image for use during the
boot process. Add a node for these.

An example is the audio-codec configuration used by some audio drivers on
Intel platforms. If no private files are provided, they will be omitted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
2463f165a3 x86: Use multiple images
We already use binman's 'multiple-images' feature with Chrome OS and we
want to use it for Edison. There is no real down-side.

Adjust x86 to always use multiple-images.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25 11:27:28 +08:00
Simon Glass
9589c447e8 x86: chromebook_panther: Correct the image layout
This board does not have microcode but at present that is not supported
by Kconfig nor the binman image layout. Fix both of these.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
a78466af82 x86: Move the fdtmap away from the binary blobs
This causes conflicts on chromebook_link64. Move it to after U-Boot where
there should be plenty of space.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-28 19:30:39 -06:00
Simon Glass
df81abda0e x86: Separate out U-Boot and device tree in ROM image
At present binman does not support updating a device tree that is part of
U-Boot (i.e u-boot.bin). Separate the entries into two so that we can get
updated entry information. This makes binman_entry_find() work correctly.

Do the same for SPL tool.

In both cases, group the two parts into a section so that SPL symbols get
the correct total size.

It may be possible for binman to handle this automatically at some point,
by ignoring u-boot.bin and always creating it from u-boot-nodtb.bin and
u-boot.dtb

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:20 +08:00
Simon Glass
4f1f507298 x86: Don't repeat microcode in U-Boot if not needed
At present if SPL sets up the microcode then it is still included in
U-Boot as well. This is wasteful as microcode is large. Adjust the logic
in the image to prevent this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:20 +08:00
Simon Glass
624c70b8ae x86: Add an fdtmap and image-header
Add these entries to the ROM so that we can list the contents of an image
with 'binman ls'. The image-header is not essential but does speed up
access.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:20 +08:00
Simon Glass
28d7d76a86 x86: Add an option to control the position of SPL
For Apollo Lake SPL is run from CAR (cache-as-RAM) which is in a different
location from where SPL must be placed in ROM. In other words, although
SPL runs before SDRAM is set up, it is not execute-in-place (XIP).

Add a Kconfig option for the ROM position.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:19 +08:00
Simon Glass
b31129528e x86: Add an option to control the position of U-Boot
The existing work-around for positioning U-Boot in the ROM when it
actually runs from RAM still exists and there is not obvious way to change
this.

Add a proper Kconfig option to handle this case. This also adds a new bool
property to indicate whether CONFIG_SYS_TEXT_BASE exists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:19 +08:00
Simon Glass
dda8e3efa0 x86: Update .dtsi file for FSP2
Include the IFWI section and the FSP-M binary. The FSP-T binary is not
currently used, as CAR is set up manually.

Also drop the FSP binary as this relates only to FSP1.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:19 +08:00
Simon Glass
86a8fb3b3b x86: Disable microcode section for FSP2
At present we don't support loading microcode with FSP2. The correct way
to do this is by adding it to the FIT. For now, disable including
microcode in the image.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:18 +08:00
Simon Glass
2e2a0035d4 x86: Add an option to include a FIT
Many Intel SoCs require a FIT in order to boot properly. Add an option to
include this and enable it by default.

This term can be confused with FIT (Flat Image Tree) in U-Boot so the
CONFIG option has to include 'X86'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 11:44:18 +08:00
Simon Glass
5e239183f6 binman: x86: Separate out 16-bit reset and init code
At present these two sections of code are linked together into a single
2KB chunk in a single file. Some Intel SoCs like to have a FIT (Firmware
Interface Table) in the ROM and the pointer for this needs to go at
0xffffffc0 which is in the middle of these two sections.

Make use of the new 'reset' entry and change the existing 16-bit entry to
include just the 16-bit data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2019-10-15 08:40:02 -06:00
Simon Glass
e766d9f183 x86: Fix device-tree indentation
With the use of a phandle we can outdent the device tree nodes a little.
Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:17 +08:00
Simon Glass
c5edefb7f7 x86: Update device tree for Chromium OS verified boot
The standard image generated by U-Boot on x86 is u-boot.rom. Add a
separate image called image.bin for verified boot. This supports
verification in TPL of which SPL/U-Boot to start, then jumping to the
correct one, with SPL setting up the SDRAM and U-Boot proper providing
the user interface if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:17 +08:00
Simon Glass
93c7607580 x86: Update device tree for TPL
Add TPL binaries to the device x86 binman desciption. When enabled, TPL
will start first, doing the 16-bit init, then jump to SPL and finally
U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:17 +08:00
Simon Glass
3ab9598df7 binman: Rename 'position' to 'offset'
After some thought, I believe there is an unfortunate naming flaw in
binman. Entries have a position and size, but now that we support
hierarchical sections it is unclear whether a position should be an
absolute position within the image, or a relative position within its
parent section.

At present 'position' actually means the relative position. This indicates
a need for an 'image position' for code that wants to find the location of
an entry without having to do calculations back through parents to
discover this image position.

A better name for the current 'position' or 'pos' is 'offset'. It is not
always an absolute position, but it is always an offset from its parent
offset.

It is unfortunate to rename this concept now, 18 months after binman was
introduced. However I believe it is the right thing to do. The impact is
mostly limited to binman itself and a few changes to in-tree users to
binman:

   tegra
   sunxi
   x86

The change makes old binman definitions (e.g. downstream or out-of-tree)
incompatible if they use the 'pos = <...>' property. Later work will
adjust binman to generate an error when it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-08-01 16:30:06 -06:00
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Bin Meng
6c22379eaf x86: dts: Include Intel Video BIOS Table in the ROM image
Now that binman is able to recognize the Video BIOS Table entry,
add such one in the u-boot.dtsi.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-16 14:57:44 +08:00
Stefan Roese
cccab03a52 x86: Add file names from Kconfig in descriptor/intel-me nodes in u-boot.dtsi
Since we now have the file names configurable via Kconfig for the flash
descriptor and intel-me files, add these from Kconfig in the corresponding
dts nodes.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-04-10 10:02:03 +08:00
Simon Glass
164f0414da x86: link: Add SPL declarations to the binman image
When building for 64-bit we need to put an SPL binary into the image. Update
the binman image description to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-02-07 13:10:56 +08:00
Bin Meng
79e550e0f3 x86: Add file names from Kconfig in CMC/FSP/VGA nodes in u-boot.dtsi
Since we already have a bunch of Kconfig options for CMC/FSP/VGA file
names, add these from Kconfig in the corresponding dts nodes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-12-26 13:36:21 +08:00
Simon Glass
b215fbd868 x86: Use binman all x86 boards
Change x86 boards to use binman to produce the ROM. This involves adding the
image definition to the device tree and using it in the Makefile. The
existing ifdtool features are no-longer needed.

Note that the u-boot.dtsi file is common and is used for all x86 boards which
use microcode. A separate emulation-u-boot-dtsi is used for the others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-12-20 08:09:55 +13:00