Commit graph

54178 commits

Author SHA1 Message Date
Boris Brezillon
779c9c0565 mtd: Parse mtdparts/mtdids again when the MTD list has been updated
Updates to the MTD device list should trigger a new parsing of the
mtdids/mtdparts vars even if those vars haven't changed.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
4c47fd0b6b mtd: Add a function to report when the MTD dev list has been updated
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.

Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Andy Shevchenko
b288cd9600 x86: acpi: Generate SPCR table
Microsoft specifies a SPCR (Serial Port Console Redirection Table) [1].
Let's provide it in U-Boot.

[1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 07:23:16 -07:00
Andy Shevchenko
f3275aa4a1 x86: acpi: Add SPCR table description
Add SPCR table description as it provided in Linux kernel.

Port subtype for ACPI_DBG2_SERIAL_PORT is used as an interface type in SPCR.
Thus, provide a set of definitions to be utilized later.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-12-05 07:23:16 -07:00
Andy Shevchenko
50bf7d03c2 serial: ns16550: Provide ->getinfo() implementation
New callback will supply necessary information, for example,
to ACPI SPCR table.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 07:23:15 -07:00
Tom Rini
a77a8fde7b Merge git://git.denx.de/u-boot-riscv
- Fix BBL may be corrupted problem.
- Support U-Boot run in S-mode.
2018-12-05 08:24:50 -05:00
Tom Rini
9649c5343f video, bmp and cls command updates
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Merge tag 'video-updates-for-2019.01-rc2' of git://git.denx.de/u-boot-video

video, bmp and cls command updates
2018-12-05 08:24:14 -05:00
Andy Shevchenko
4e7207791c serial: ns16550: Read reg-io-width from device tree
Cache the value of the reg-io-width property for the future use.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
0af761620f serial: ns16550: Group reg_* members of ns16550_platdata
Group reg_* members of struct ns16550_platdata together for better maintenance.

No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:35 -07:00
Andy Shevchenko
d5bb4f862b dm: serial: Introduce ->getinfo() callback
New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:08:31 -07:00
Andy Shevchenko
ac7f5db9dc dm: serial: Add ->getconfig() callback
In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Patrick Delaunay
4f86a724e8 power: regulator: denied disable on always-on regulator
Don't disable regulator which are tagged as "regulator-always-on" in DT.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jack Mitchell <jack@embed.me.uk>
Tested-by: Jack Mitchell <jack@embed.me.uk>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Richard Röjfors <richard@puffinpack.se>
Tested-by: Richard Röjfors <richard@puffinpack.se>
Reviewed-by: Felix Brack <fb@ltec.ch>
Tested-by: Felix Brack <fb@ltec.ch>
2018-12-05 06:06:44 -07:00
Álvaro Fernández Rojas
7959882049 dm: core: add functions to get/remap I/O addresses by name
This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property.
This is needed in bmips dma/eth patch series, but can also be used on many
other drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Simon Glass
bb48470df2 binman: Add myself as maintainer
Add an entry for my maintainership of this tool.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:44 -07:00
Philipp Tomsich
759a99c242 dm: (re)sort uclass ids alphabetically
The comment in uclass-id.h states that
    "U-Boot uclasses start here - in alphabetical order"
but the subsequent list is not sorted alphabetically.
This reestablishes order.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-05 06:06:44 -07:00
Philipp Tomsich
a4b33c5aba dm: rtc: Fix function name in comment
The documentation comment for dm_rtc_set was referring to dm_rtc_put
instead. Fix it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-05 06:06:44 -07:00
Trevor Woerner
b11f12642f buildman/toolchain.py: handle inconsistent tarball names
Unfortunately, for some releases the kernel.org toolchain tarball names adhere
to the following pattern:

	<hostarch>-gcc-<ver>-nolib-<targetarch>-<type>.tar.xz

e.g.:
	x86_64-gcc-8.1.0-nolibc-aarch64-linux.tar.xz

while others use the following pattern:

	<hostarch>-gcc-<ver>-nolib_<targetarch>-<type>.tar.xz

e.g.:

	x86_64-gcc-7.3.0-nolibc_aarch64-linux.tar.xz

Notice that the first pattern has dashes throughout, while the second has
dashes throughout except just before the target architecture which has an
underscore.

The "dash throughout" versions from kernel.org are:

	8.1.0, 6.4.0, 5.5.0, 4.9.4, 4.8.5, 4.6.1

while the "dash and underscore" versions from kernel.org are:

	7.3.0, 4.9.0, 4.8.0, 4.7.3, 4.6.3, 4.6.2, 4.5.1, 4.2.4

This tweak allows the code to handle both versions. Note that this tweak also
causes the architecture parsing to get confused and find the following two
bogus architectures, "2.0" and "64", which are explicitly checked for, and
removed.

Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Change single quotes to double quotes:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:06:30 -07:00
Trevor Woerner
d82f539ab9 buildman/toolchain.py: fix toolchain directory
The hexagon toolchain (4.6.1) from kernel.org, for example, was packaged in
a way that is different from most toolchains. The first entry when unpacking
most toolchain tarballs is:

	gcc-<version>-nolib/<targetarch>-<system>

e.g.:

	gcc-8.1.0-nolibc/aarch64-linux/

The first entry of the hexagon toolchain, however, is:

	gcc-4.6.1-nolibc/

This causes the buildman logic in toolchain.py::ScanPath() to not be able to
find the "*gcc" executable since it looks in gcc-4.6.1-nolib/{.|bin|usr/bin}
instead of gcc-4.6.1/hexagon-linux/{.|bin|usr/bin}. Therefore when buildman
tries to download a set of toolchains that includes hexagon, the script fails.

This update takes the second line of the tarball unpacking (which works for
all the toolchains I've tested from kernel.org) and parses it to take the
first two elements, separated by '/'. It makes this logic a bit more robust.

Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
bcb514ac02 Add inttypes.h
Even if U-Boot does not use this, some libraries do. Add back this header
file so that the build does not fall back to using the host version, which
may include stdint.h and break the build due to conflicts with uint64_t,
etc.

This partially reverts commit dee37fc99d ("Remove <inttypes.h> includes
and PRI* usages in printf() entirely")

The only change from the file that was in U-Boot until recently is that it
now comes twice as close to passing checkpatch. The remaining warnings
pertain to the typedefs, which checkpatch does not like.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
277f4eb2e8 Add UINT32_MAX and UINT64_MAX
These constants are defined by stdint.h but not by kernel.h, which is
its stand-in in U-Boot. Add the definitions so that libraries which expect
stdint.h constants can work.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
49c751603c time: Update mdelay() to delay in one large chunk
The current function delays in one millisecond at a time. This does not
work well on sandbox since it results in lots of calls to usleep(1000) in
a tight loop. This makes the sleep duration quite variable since each call
results in a sleep of *at least* 1000us, but possibly more. Depending on
how busy the machine is, the sleep time can change quite a bit.

We cannot fix this in general, but we can reduce the effect by doing a
single sleep. The multiplication works fine with an unsigned long argument
up until a sleep time of about 4m milliseconds. This is over an hour and
we can be sure that delays of that length are not useful.

Update the mdelay() function to call udelay() only once with the
calculated delay value.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
4a978e86d7 video: backlight: Fix log message in enable_sequence()
This has an extra argument. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
2018-12-05 06:01:35 -07:00
Simon Glass
165be50f5a input: i8042: Use remove() instead of exported functions
We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.

We could potentially add a method to flush input but that does not seem
necessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:35 -07:00
Simon Glass
eafb4a59db cros_ec: Adjust to use v1 vboot context only
At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.

Update the code to limit the size to 16 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
a749c09a1e cros: Correct a printf() string and comment
Correct a warning that occurs on sandbox. Also fix the comment style in
cros_ec_set_lid_shutdown_mask().

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
5092af6b57 tpm: Fix a logging warning in unpack_byte_string()
Fix the printf() string to avoid a warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
be8a025ed7 tpm: Add non-volatile index attributes needed for v2
Version-2 TPMs support attributes for nvdata. Add definitions to the
header file so that clients can use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
5e69b8bc04 tpm: Export tpm_clear_and_reenable()
This function is intended to be exported but is not. Add it to the header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
0a60a0a65f tpm: Remove use of build-time TPM versions
There is only one place in the code which assumes at build-time that we
are using either a v1 or a v2 TPM. Fix this up and add a new function to
return the version of a TPM.

Supported TPM versions (v1 and v2) can be enabled independently and it is
possible to use both versions at once. This is useful for sandbox when
running tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
40e9ede1dc sandbox: Use 'extras' to specify 'head' files
At present sandbox has a start.o in the 'start' target but also includes
it in the normal target list. This is not how this is normally handled. It
is needed because sandbox does not include the u-boot-init variable in its
link rule.

Update the rule and move start.o from the normal target list to the
'extras' list.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
a65d1a06c9 sandbox: Zero the ram buffer on startup
At present the RAM buffer is not inited unless it is read from a file,
likely produced by an earlier phase of U-Boot. This causes valgrind
warnings whenever the RAM buffer is used. Correct this by initing it if
needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
2a07269062 sandbox: sysreset: Update to support power-on reset
If U-Boot is started from SPL or TPL, then those earlier phases deal with
the reset cause. On real hardware this cause may be lost once it is read.
Emulate that behaviour in sandbox by reporting a warm reset when a
previous phase has run since start-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
e628bba785 sandbox: net: Correct name copy in eth_raw_bus_post_bind()
We cannot be sure that the interface name takes up the full length of the
space available to it. Use strcpy() instead of memcpy() in this case. This
corrects a valgrind warning.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
e3491fb11f sandbox: physmem: Use mapping to support sandbox
Replace the raw cast with a map_sysmem() call so this code works with
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
12efc933b9 sandbox: Check the filename in jump_to_image_no_args()
If the filename is NULL this function currently crashes. Update it to fail
gracefully.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Simon Glass
6b5e420137 sandbox: Fix up the debug message for the image filename
This currently prints out the wrong filename. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-05 06:01:34 -07:00
Carlo Caione
fb19c7bade pinctrl: meson: Fix GPIO direction registers access
The macros used to set the direction of the GPIO pins are misused,
resulting in a wrong behavior when trying to read the GPIO input level
from U-Boot.

A better macro is also used when setting the output direction.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-12-05 10:39:17 +01:00
Rick Chen
48cbf62460 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.

But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.

So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.

In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.

When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2018-12-05 14:14:16 +08:00
Anup Patel
4c60113647 riscv: Add S-mode defconfigs for QEMU virt machine
This patch adds S-mode defconfigs for QEMU virt machine so
that we can run u-boot in S-mode on QEMU using M-mode runtime
firmware (BBL or equivalent).

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:14:04 +08:00
Anup Patel
ef8c3d3fce riscv: qemu: Use different SYS_TEXT_BASE for S-mode
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.

Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:13:59 +08:00
Anup Patel
d2db2a8fa4 riscv: Add kconfig option to run U-Boot in S-mode
This patch adds kconfig option RISCV_SMODE to run U-Boot in
S-mode. When this opition is enabled we use s<xyz> CSRs instead
of m<xyz> CSRs.

It is important to note that there is no equivalent S-mode CSR
for misa and mhartid CSRs so we expect M-mode runtime firmware
(BBL or equivalent) to emulate misa and mhartid CSR read.

In-future, we will have more patches to avoid accessing misa and
mhartid CSRs from S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:13:53 +08:00
Tom Rini
2e2a2a5d4f Merge branch 'master' of git://git.denx.de/u-boot-sh
- DT sync with Linux 4.19 and minor fixes.
2018-12-04 19:22:31 -05:00
Rajesh Bhagat
119c01c2a5 env: sf: define API to override sf environment address
Defines env_sf_get_env_addr API to override sf environment address,
required to support multiple environment.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04 13:07:36 -08:00
Rajesh Bhagat
b6cba297af env: allow flash and nand env driver to compile together
Define env_ptr as static in flash and nand env driver to
allow these to compile together.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-12-04 13:07:13 -08:00
Anatolij Gustschin
96d82f6c86 video: use BMP_ALIGN_CENTER define from splash.h
Drop BMP_ALIGN_CENTER define in lcd.c and video_bmp.c as it is
already defined by splash.h. Include splash.h in bmp code.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2018-12-04 19:47:20 +01:00
Patrick Delaunay
b0fcedb7ad cmd: bmp: manage centered display
Allow to display BMP at the middle of the screen.

'm' means "middle" as it is done for the splashscreen variable:
splashpos=m,m

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-12-04 19:45:57 +01:00
Anatolij Gustschin
4e92e60d35 cmd: add clear screen 'cls' command
Add common clear screen command for configurations
CONFIG_DM_VIDEO, CONFIG_LCD and CONFIG_CFB_CONSOLE.

Remove the existing cls command implementation from
lcd.c code and activate the command for all boards
enabling CONFIG_LCD for compatibility reasons.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Patrick.Delaunay <patrick.delaunay@free.fr>
2018-12-04 19:44:57 +01:00
York Sun
d171c70716 move data structure out of cpu.h
Move static definitions to cpu.c file, as it doesn't allow
the cpu.h file to be included in multiple c files.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-12-04 08:30:23 -08:00
Marek Vasut
0451380505 ARM: dts: Turn ULCB into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796 ULCB variants into single U-Boot
build and let U-Boot choose between them based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
14ebe87b58 ARM: dts: Turn Salvator-X into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796, R8A77965 Salvator-X variants
into the single U-Boot build and let U-Boot choose between them
based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00