We cannot use device structures to disable devices, since getting
them with the API functions would bind and activate the device, which
would fail if the underlying device does not exist.
Reviewed-by: Simon Glass <sjg@chromium.org>
Add tests for the ofnode_set_enabled, ofnode_write_string, and
ofnode_write_property functions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Implement a set of functions to manipulate properties in a live device
tree:
* ofnode_write_prop() to set generic properties of a node
* ofnode_write_string() to set string properties of a node
* ofnode_set_enabled() to either enable or disable a node
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we get a problem like overlapping regions it is sometimes hard to
figure what what is going on. At present we don't write the map file in
this case. However the file does provide useful information.
Catch any packing errors and write a map file (if enabled with -m) to aid
debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
For sandbox we want to put ELF files in the image since that is what we
need to execute. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally x86 platforms use the end-at-4gb option. This currently produces
an FMAP with positions which have a large offset. The use of end-at-4gb is
a useful convenience within binman, but we don't really want to export
a map with these offsets.
Fix this by subtracting the 'skip at start' parameter.
Also put the code which convers names to fmap format, for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sections have no record of their parent so it is not possible
to traverse up the tree to the root and figure out the position of a
section within the image.
Change the constructor to record this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
When TPL is used on x86 we may want to program the microcode (at least for
the first CPU) early in boot. Add support for this by refactoring the
existing code to be more generic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimesi it us useful to be able to verify the content of entries with
a hash. Add an easy way to do this in binman. The hash information can be
retrieved from the device tree at run time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Images and sections have the same attributes, since an image is mostly
just a top-level section. Update the docs to explain this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is useful to add a group of files to the image and be
able to access them at run-time. Of course it is possible to generate
the binman config file with a set of blobs each with a filename. But for
convenience, add an entry type which can do this.
Add required support (for adding nodes and string properties) into the
state module.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if there is only a zero-size entry in a section this is
reported as an error, e.g.:
Offset 0x0 (0) is outside the section starting at 0x0 (0)
Adjust the logic in CheckEntries() to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for compressing blob entries. This can help reduce image sizes
for many types of data. It requires that the firmware be able to
decompress the data at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
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Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the pinctrl function enabled and the device tree setting up
the pins we want to use, this patch removes the manual pinmuxing
except for that which is not done by the device tree and minimal
pins necessary for SPL (like serial, GPMC, and MMC)
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_I2C and DM_GPIO working, this patch can enable the
GPIO expander on the I2C bus. This GPIO expander is connected
to some of the DIP switches and can now read the status of these
pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
The simple pin controller works for da850, so this patch enables
this to pin-mux the pins defined in the device tree for the da850evm.
Signed-off-by: Adam Ford <aford173@gmail.com>
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Signed-off-by: Adam Ford <aford173@gmail.com>
Previously poweroff was located under boot. It seems to make more
sense to have it located under the Device access commands.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the omap_mmc driver no longer supporting cd-inverted, this
patch removes all these references since they are not needed.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this. This
patch removes the support for 'invert' from the MMC driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This adds the support for PDA detection as common code for
Atmel boards.
Using the one wire interface over GPIO , an EEPROM memory is read
and compared to preprogrammed values for PDA screens TM4300, TM7000
and TM7000B.
Once the PDA is detected, an environment variable is set accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D4 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D3 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
To be able to test Dallas onewire protocol and one wire eeproms driver
and subsystem, add in sandbox defconfig the drivers' config.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
